Searched refs:R300_DST_PIPE_CONFIG (Results 1 – 9 of 9) sorted by relevance
137 tmp = RREG32(R300_DST_PIPE_CONFIG); in r420_pipes_init()138 WREG32(R300_DST_PIPE_CONFIG, tmp | R300_PIPE_AUTO_CONFIG); in r420_pipes_init()474 tmp = RREG32(R300_DST_PIPE_CONFIG); in r420_debugfs_pipes_info()
87 tmp = RREG32(R300_DST_PIPE_CONFIG); in r520_gpu_init()
251 radeon_ring_write(ring, PACKET0(R300_DST_PIPE_CONFIG, 0)); in r300_ring_start()364 tmp = RREG32(R300_DST_PIPE_CONFIG); in r300_gpu_init()365 WREG32(R300_DST_PIPE_CONFIG, tmp | R300_PIPE_AUTO_CONFIG); in r300_gpu_init()
90 #define R300_DST_PIPE_CONFIG 0x170c macro
82 radeon_ring_write(ring, PACKET0(R300_DST_PIPE_CONFIG, 0)); in rv515_ring_start()167 tmp = RREG32(R300_DST_PIPE_CONFIG); in rv515_gpu_init()
466 RADEON_WRITE(R300_DST_PIPE_CONFIG, RADEON_READ(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG); in radeon_init_pipes()
699 #define R300_DST_PIPE_CONFIG 0x170c macro
452 RADEON_WRITE(R300_DST_PIPE_CONFIG, RADEON_READ(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG); in radeon_init_pipes()
777 #define R300_DST_PIPE_CONFIG 0x170c macro