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Searched refs:OptForSize (Results 1 – 6 of 6) sorted by relevance

/trueos/contrib/llvm/lib/Transforms/Vectorize/
HDLoopVectorize.cpp693 VectorizationFactor selectVectorizationFactor(bool OptForSize,
706 unsigned selectUnrollFactor(bool OptForSize, unsigned UserUF, unsigned VF,
952 bool OptForSize = F->getAttributes().hasAttribute(FnIndex, SzAttr); in runOnLoop() local
963 VF = CM.selectVectorizationFactor(OptForSize, Hints.Width); in runOnLoop()
965 unsigned UF = CM.selectUnrollFactor(OptForSize, Hints.Unroll, VF.Width, in runOnLoop()
4436 LoopVectorizationCostModel::selectVectorizationFactor(bool OptForSize, in selectVectorizationFactor() argument
4440 if (OptForSize && Legal->getRuntimePointerCheck()->Need) { in selectVectorizationFactor()
4472 if (OptForSize) { in selectVectorizationFactor()
4563 LoopVectorizationCostModel::selectUnrollFactor(bool OptForSize, in selectUnrollFactor() argument
4587 if (OptForSize) in selectUnrollFactor()
/trueos/contrib/llvm/lib/Target/X86/
HDX86ISelDAGToDAG.cpp151 bool OptForSize; member in __anon6b75a3a20311::X86DAGToDAGISel
157 OptForSize(false) {} in X86DAGToDAGISel()
440 OptForSize = MF->getFunction()->getAttributes(). in PreprocessISelDAG()
HDX86InstrSSE.td1777 XD, Requires<[HasAVX, OptForSize]>, VEX_4V, VEX_LIG,
1793 Requires<[UseSSE2, OptForSize]>, Sched<[WriteCvtF2FLd]>;
1841 XS, VEX_4V, VEX_LIG, Requires<[HasAVX, OptForSize]>,
1852 Requires<[UseAVX, OptForSize]>;
1866 Requires<[UseSSE2, OptForSize]>, Sched<[WriteCvtF2FLd]>;
3085 // only in OptForSize mode. It eliminates an instruction, but it also
3091 Requires<[UseSSE1, OptForSize]>, Sched<[itins.Sched.Folded]>;
3131 // only in OptForSize mode. It eliminates an instruction, but it also
3137 Requires<[UseSSE1, OptForSize]>, Sched<[itins.Sched.Folded]>;
3254 // See the comments in sse1_fp_unop_s for why this is OptForSize.
[all …]
HDX86InstrAVX512.td2574 Requires<[HasAVX512, OptForSize]>;
3005 Requires<[OptForSize]>;
3010 Requires<[OptForSize]>;
3016 Requires<[OptForSize]>;
3022 Requires<[OptForSize]>;
HDX86InstrInfo.td709 def OptForSize : Predicate<"OptForSize">;
710 def OptForSpeed : Predicate<"!OptForSize">;
HDX86ISelLowering.cpp7276 bool OptForSize = MF.getFunction()->getAttributes(). in LowerVECTOR_SHUFFLE() local
7311 if (OptForSize && isUNPCKL_v_undef_Mask(M, VT, HasInt256)) in LowerVECTOR_SHUFFLE()
7313 if (OptForSize && isUNPCKH_v_undef_Mask(M, VT, HasInt256)) in LowerVECTOR_SHUFFLE()