Searched refs:ImplicitDefs (Results 1 – 13 of 13) sorted by relevance
147 const uint16_t *ImplicitDefs; // Registers implicitly defined by this instr variable524 return ImplicitDefs; in getImplicitDefs()529 if (ImplicitDefs == 0) return 0; in getNumImplicitDefs()531 for (; ImplicitDefs[i]; ++i) /*empty*/; in getNumImplicitDefs()548 if (const uint16_t *ImpDefs = ImplicitDefs)
1229 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_r()1251 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_rr()1275 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_rrr()1296 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_ri()1319 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_rii()1340 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_rf()1364 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_rri()1388 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_rrii()1404 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_i()1421 ResultReg).addReg(II.ImplicitDefs[0]); in FastEmitInst_ii()
436 assert(MCID.ImplicitDefs && "Physical reg def must be in implicit def list!"); in getPhysicalRegisterVT()514 if (!MCID.ImplicitDefs) in DelayForLiveRegsBottomUp()
125 II.ImplicitDefs[ResNo - II.getNumDefs()] == Reg) { in CheckForPhysRegDependency()
1193 assert(MCID.ImplicitDefs && "Physical reg def must be in implicit def list!"); in getPhysicalRegisterVT()1319 if (!MCID.ImplicitDefs) in DelayForLiveRegsBottomUp()
329 ImplicitDefs = R->getValueAsListOfDefs("Defs"); in CodeGenInstruction()361 if (ImplicitDefs.empty()) return MVT::Other; in HasOneImplicitDefWithKnownVT()364 Record *FirstImplicitDef = ImplicitDefs[0]; in HasOneImplicitDefWithKnownVT()
215 std::vector<Record*> ImplicitDefs, ImplicitUses; variable
811 HandledReg = II.ImplicitDefs[0]; in EmitResultInstructionAsOperand()936 HandledReg = II.ImplicitDefs[0]; in EmitResultCode()
1631 if (!InstInfo.ImplicitDefs.empty()) { in ApplyTypeConstraints()
587 if (NewDesc.ImplicitDefs) { in moveToVALU()588 for (unsigned i = 0; NewDesc.ImplicitDefs[i]; ++i) { in moveToVALU()589 unsigned Reg = NewDesc.ImplicitDefs[i]; in moveToVALU()
339 .addReg(II.ImplicitDefs[0])); in FastEmitInst_r()366 .addReg(II.ImplicitDefs[0])); in FastEmitInst_rr()397 .addReg(II.ImplicitDefs[0])); in FastEmitInst_rrr()422 .addReg(II.ImplicitDefs[0])); in FastEmitInst_ri()447 .addReg(II.ImplicitDefs[0])); in FastEmitInst_rf()476 .addReg(II.ImplicitDefs[0])); in FastEmitInst_rri()495 .addReg(II.ImplicitDefs[0])); in FastEmitInst_i()515 .addReg(II.ImplicitDefs[0])); in FastEmitInst_ii()
521 if (MCID->ImplicitDefs) in addImplicitDefUseOperands()
1340 if (NewDesc.ImplicitDefs) in optimizeCompareInstr()