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Searched refs:I915_WRITE16 (Results 1 – 5 of 5) sorted by relevance

/trueos/sys/dev/drm2/i915/
HDi915_irq.c320 I915_WRITE16(MEMINTRSTS, MEMINT_EVAL_CHG); in i915_handle_rps_change()
735 I915_WRITE16(MEMINTRSTS, I915_READ(MEMINTRSTS)); in ironlake_irq_handler()
1580 I915_WRITE16(IMR, 0xffff); in i8xx_irq_preinstall()
1581 I915_WRITE16(IER, 0x0); in i8xx_irq_preinstall()
1592 I915_WRITE16(EMR, in i8xx_irq_postinstall()
1602 I915_WRITE16(IMR, dev_priv->irq_mask); in i8xx_irq_postinstall()
1604 I915_WRITE16(IER, in i8xx_irq_postinstall()
1659 I915_WRITE16(IIR, iir & ~flip_mask); in i8xx_irq_handler()
1699 I915_WRITE16(IMR, 0xffff); in i8xx_irq_uninstall()
1700 I915_WRITE16(IER, 0x0); in i8xx_irq_uninstall()
[all …]
HDintel_pm.c2191 I915_WRITE16(MEMSWCTL, rgvswctl); in ironlake_set_drps()
2195 I915_WRITE16(MEMSWCTL, rgvswctl); in ironlake_set_drps()
2207 I915_WRITE16(PMMISC, I915_READ(PMMISC) | MCPPCE_EN); in ironlake_enable_drps()
2208 I915_WRITE16(TSC1, I915_READ(TSC1) | TSE); in ironlake_enable_drps()
3471 I915_WRITE16(DEUC, 0); in crestline_init_clock_gating()
HDintel_ringbuffer.c742 I915_WRITE16(IMR, dev_priv->irq_mask); in i8xx_ring_get_irq()
758 I915_WRITE16(IMR, dev_priv->irq_mask); in i8xx_ring_put_irq()
HDi915_drv.h1425 #define I915_WRITE16(reg, val) i915_write16(dev_priv, (reg), (val)) macro
/trueos/sys/dev/drm/
HDi915_drv.h570 #define I915_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, (reg), (val)) macro