Searched refs:HSW_TVIDEO_DIP_CTL (Results 1 – 2 of 2) sorted by relevance
284 u32 ctl_reg = HSW_TVIDEO_DIP_CTL(intel_crtc->pipe); in hsw_write_infoframe()721 I915_WRITE(HSW_TVIDEO_DIP_CTL(i), 0); in intel_hdmi_init()
3590 #define HSW_TVIDEO_DIP_CTL(pipe) \ macro