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Searched refs:EFSYS_ASSERT (Results 1 – 24 of 24) sorted by relevance

/trueos/sys/dev/sfxge/common/
HDefx_nic.c304 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_PROBE)); in efx_nic_probe()
351 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_NIC)); in efx_nic_pcie_tune()
366 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_NIC)); in efx_nic_pcie_extended_sync()
415 EFSYS_ASSERT(enp->en_mod_flags & EFX_MOD_PROBE); in efx_nic_fini()
416 EFSYS_ASSERT(enp->en_mod_flags & EFX_MOD_NIC); in efx_nic_fini()
417 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_INTR)); in efx_nic_fini()
418 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV)); in efx_nic_fini()
419 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX)); in efx_nic_fini()
420 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX)); in efx_nic_fini()
438 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_NIC)); in efx_nic_unprobe()
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HDefx_ev.c252 EFSYS_ASSERT(B_FALSE); in efx_ev_rx()
319 EFSYS_ASSERT(eecp->eec_rx != NULL); in efx_ev_rx()
348 EFSYS_ASSERT(eecp->eec_tx != NULL); in efx_ev_tx()
420 EFSYS_ASSERT(eecp->eec_txq_flush_done != NULL); in efx_ev_driver()
432 EFSYS_ASSERT(eecp->eec_rxq_flush_done != NULL); in efx_ev_driver()
433 EFSYS_ASSERT(eecp->eec_rxq_flush_failed != NULL); in efx_ev_driver()
452 EFSYS_ASSERT(eecp->eec_initialized != NULL); in efx_ev_driver()
468 EFSYS_ASSERT(eecp->eec_sram != NULL); in efx_ev_driver()
478 EFSYS_ASSERT(eecp->eec_wake_up != NULL); in efx_ev_driver()
492 EFSYS_ASSERT(eecp->eec_timer != NULL); in efx_ev_driver()
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HDsiena_mon.c40 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_mon_reset()
50 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_mon_reconfigure()
165 EFSYS_ASSERT(efx_sensor < EFX_MON_NSTATS); in siena_mon_decode_stats()
212 EFSYS_ASSERT((1 << ev_monitor) & encp->enc_siena_mon_stat_mask); in siena_mon_ev()
223 EFSYS_ASSERT(id < EFX_MON_NSTATS); in siena_mon_ev()
250 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_mon_stats_update()
272 EFSYS_ASSERT(vmask == encp->enc_mon_stat_mask); in siena_mon_stats_update()
HDefx_port.c76 EFSYS_ASSERT(enp->en_reset_flags & EFX_RESET_PHY); in efx_port_init()
109 EFSYS_ASSERT(emop != NULL); in efx_port_poll()
110 EFSYS_ASSERT(!epp->ep_mac_stats_pending); in efx_port_poll()
141 EFSYS_ASSERT(emop != NULL); in efx_port_loopback_set()
143 EFSYS_ASSERT(link_mode < EFX_LINK_NMODES); in efx_port_loopback_set()
217 EFSYS_ASSERT(epp->ep_mac_drain); in efx_port_fini()
HDefx_mac.c124 EFSYS_ASSERT(emop != NULL); in efx_mac_pdu_set()
247 EFSYS_ASSERT(emop != NULL); in efx_mac_drain()
258 EFSYS_ASSERT(enp->en_reset_flags & EFX_RESET_MAC); in efx_mac_drain()
531 EFSYS_ASSERT(emop != NULL); in efx_mac_stats_upload()
565 EFSYS_ASSERT(emop != NULL); in efx_mac_stats_periodic()
599 EFSYS_ASSERT(emop != NULL); in efx_mac_stats_update()
666 EFSYS_ASSERT(type != EFX_MAC_INVALID); in efx_mac_select()
669 EFSYS_ASSERT(emop != NULL); in efx_mac_select()
677 EFSYS_ASSERT(enp->en_reset_flags & EFX_RESET_MAC); in efx_mac_select()
HDsiena_vpd.c57 EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0 || in siena_vpd_get_static()
165 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_vpd_init()
208 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_vpd_size()
247 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_vpd_read()
300 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_vpd_verify()
413 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_vpd_get()
455 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_vpd_set()
513 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_vpd_write()
591 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_vpd_fini()
HDefx_mcdi.c74 EFSYS_ASSERT(0); in efx_mcdi_request_start()
91 EFSYS_ASSERT(emip->emi_pending_req == NULL); in efx_mcdi_request_start()
196 EFSYS_ASSERT(rc == EIO || rc == EINTR); in efx_mcdi_raise_exception()
229 EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2); in efx_mcdi_poll_reboot()
271 EFSYS_ASSERT(emip->emi_pending_req != NULL); in efx_mcdi_request_poll()
272 EFSYS_ASSERT(!emip->emi_ev_cpl); in efx_mcdi_request_poll()
285 EFSYS_ASSERT(emip->emi_port == 1 || emip->emi_port == 2); in efx_mcdi_request_poll()
403 EFSYS_ASSERT(emip->emi_aborted > 0); in efx_mcdi_ev_cpl()
HDefx_filter.c149 EFSYS_ASSERT(B_FALSE); in efx_filter_tbl_id()
189 EFSYS_ASSERT(B_FALSE); in efx_filter_reset_search_depth()
332 EFSYS_ASSERT(B_FALSE); in efx_filter_build()
673 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_FILTER)); in efx_filter_init()
788 EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | in efx_filter_spec_rx_ipv4_tcp_full()
806 EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | in efx_filter_spec_rx_ipv4_tcp_wild()
826 EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | in efx_filter_spec_rx_ipv4_udp_full()
844 EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | in efx_filter_spec_rx_ipv4_udp_wild()
864 EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | in efx_filter_spec_rx_mac_full()
891 EFSYS_ASSERT((flags & ~(EFX_FILTER_FLAG_RX_RSS | in efx_filter_spec_rx_mac_wild()
HDefx_sram.c286 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX)); in efx_sram_test()
287 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX)); in efx_sram_test()
288 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV)); in efx_sram_test()
HDefx_bootcfg.c180 EFSYS_ASSERT(used_bytes >= 2); /* checksum and DHCP_END */ in efx_bootcfg_read()
181 EFSYS_ASSERT(used_bytes <= sector_length); in efx_bootcfg_read()
267 EFSYS_ASSERT(used_bytes >= 2); /* checksum and DHCP_END */ in efx_bootcfg_write()
HDsiena_sram.c44 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_sram_init()
88 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_SIENA); in siena_sram_test()
HDefx_intr.c159 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV)); in efx_intr_trigger()
177 EFSYS_ASSERT(B_FALSE); in efx_intr_trigger()
338 EFSYS_ASSERT(0); in efx_intr_fatal()
HDefx_mon.c65 EFSYS_ASSERT(encp->enc_mon_type != EFX_MON_INVALID); in efx_mon_name()
158 EFSYS_ASSERT(encp->enc_mon_type != EFX_MON_INVALID); in efx_mon_init()
HDefx_phy.c418 EFSYS_ASSERT(B_FALSE); in efx_phy_adv_cap_get()
463 EFSYS_ASSERT(0); in efx_phy_adv_cap_set()
710 EFSYS_ASSERT(epop->epo_bist_poll != NULL); in efx_phy_bist_poll()
745 EFSYS_ASSERT(epop->epo_bist_stop != NULL); in efx_phy_bist_stop()
HDsiena_phy.c351 EFSYS_ASSERT(0); in siena_phy_reconfigure()
574 EFSYS_ASSERT(smask == encp->enc_phy_stat_mask); in siena_phy_stats_update()
658 EFSYS_ASSERT(0); in siena_phy_bist_start()
716 EFSYS_ASSERT(MC_CMD_POLL_BIST_IN_LEN == 0);
832 EFSYS_ASSERT(resultp != NULL);
HDefx_nvram.c82 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_NVRAM)); in efx_nvram_init()
98 EFSYS_ASSERT(0); in efx_nvram_init()
HDefx_tx.c184 EFSYS_ASSERT(P2ROUNDUP(start + 1, 4096) >= end); in efx_tx_qpost()
462 EFSYS_ASSERT(enp->en_tx_qcount != 0); in efx_tx_qdestroy()
HDefx_vpd.c98 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_VPD)); in efx_vpd_init()
114 EFSYS_ASSERT(0); in efx_vpd_init()
HDefx_wol.c45 EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_WOL)); in efx_wol_init()
HDefx_rx.c797 EFSYS_ASSERT(enp->en_rx_qcount != 0); in efx_rx_qdestroy()
HDsiena_nic.c182 EFSYS_ASSERT(ofst <= MC_CMD_GET_ASSERTS_OUT_LEN); in siena_nic_read_assertion()
HDsiena_nvram.c481 EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 || in siena_nvram_get_dynamic_cfg()
HDefsys.h1151 #define EFSYS_ASSERT(_exp) do { \ macro
/trueos/sys/dev/sfxge/
HDsfxge_port.c705 EFSYS_ASSERT(B_FALSE); in sfxge_link_mode_to_phy_cap()