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Searched refs:DestVT (Results 1 – 11 of 11) sorted by relevance

/trueos/contrib/llvm/lib/Target/PowerPC/
HDPPCFastISel.cpp154 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
827 EVT DestVT = TLI.getValueType(I->getType(), true); in SelectFPExt() local
829 if (SrcVT != MVT::f32 || DestVT != MVT::f64) in SelectFPExt()
845 EVT DestVT = TLI.getValueType(I->getType(), true); in SelectFPTrunc() local
847 if (SrcVT != MVT::f64 || DestVT != MVT::f32) in SelectFPTrunc()
1086 EVT DestVT = TLI.getValueType(I->getType(), true); in SelectBinaryIntOp() local
1090 if (DestVT != MVT::i16 && DestVT != MVT::i8) in SelectBinaryIntOp()
1243 MVT DestVT = VA.getLocVT(); in processCallArgs() local
1245 (DestVT == MVT::i64) ? &PPC::G8RCRegClass : &PPC::GPRCRegClass; in processCallArgs()
1247 if (!PPCEmitIntExt(ArgVT, Arg, DestVT, TmpReg, /*IsZExt*/false)) in processCallArgs()
[all …]
HDPPCISelLowering.cpp5175 EVT DestVT = MVT::Other) { in BuildIntrinsicOp() argument
5176 if (DestVT == MVT::Other) DestVT = Op.getValueType(); in BuildIntrinsicOp()
5177 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, in BuildIntrinsicOp()
5185 EVT DestVT = MVT::Other) { in BuildIntrinsicOp() argument
5186 if (DestVT == MVT::Other) DestVT = LHS.getValueType(); in BuildIntrinsicOp()
5187 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, in BuildIntrinsicOp()
5195 SDLoc dl, EVT DestVT = MVT::Other) { in BuildIntrinsicOp() argument
5196 if (DestVT == MVT::Other) DestVT = Op0.getValueType(); in BuildIntrinsicOp()
5197 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, DestVT, in BuildIntrinsicOp()
/trueos/contrib/llvm/lib/Target/ARM/
HDARMFastISel.cpp195 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1830 EVT DestVT = TLI.getValueType(I->getType(), true); in SelectBinaryIntOp() local
1834 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1) in SelectBinaryIntOp()
2033 MVT DestVT = VA.getLocVT(); in ProcessCallArgs() local
2034 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false); in ProcessCallArgs()
2036 ArgVT = DestVT; in ProcessCallArgs()
2042 MVT DestVT = VA.getLocVT(); in ProcessCallArgs() local
2043 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true); in ProcessCallArgs()
2045 ArgVT = DestVT; in ProcessCallArgs()
2116 MVT DestVT = RVLocs[0].getValVT(); in FinishCall() local
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/trueos/contrib/llvm/lib/CodeGen/SelectionDAG/
HDSelectionDAGBuilder.cpp2808 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType()); in visitICmp() local
2809 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Opcode)); in visitICmp()
2823 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType()); in visitFCmp() local
2824 setValue(&I, DAG.getSetCC(getCurSDLoc(), DestVT, Op1, Op2, Condition)); in visitFCmp()
2857 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType()); in visitTrunc() local
2858 setValue(&I, DAG.getNode(ISD::TRUNCATE, getCurSDLoc(), DestVT, N)); in visitTrunc()
2865 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType()); in visitZExt() local
2866 setValue(&I, DAG.getNode(ISD::ZERO_EXTEND, getCurSDLoc(), DestVT, N)); in visitZExt()
2873 EVT DestVT = TM.getTargetLowering()->getValueType(I.getType()); in visitSExt() local
2874 setValue(&I, DAG.getNode(ISD::SIGN_EXTEND, getCurSDLoc(), DestVT, N)); in visitSExt()
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HDLegalizeDAG.cpp120 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT, SDLoc dl);
126 SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue LegalOp, EVT DestVT,
128 SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, bool isSigned,
130 SDValue PromoteLegalFP_TO_INT(SDValue LegalOp, EVT DestVT, bool isSigned,
1719 EVT DestVT, in EmitStackConvert() argument
1733 unsigned DestSize = DestVT.getSizeInBits(); in EmitStackConvert()
1734 Type *DestType = DestVT.getTypeForEVT(*DAG.getContext()); in EmitStackConvert()
1752 return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo, in EmitStackConvert()
1756 return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, in EmitStackConvert()
2253 EVT DestVT, in ExpandLegalINT_TO_FP() argument
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HDLegalizeTypes.cpp886 EVT DestVT) { in CreateStackStoreLoad() argument
890 SDValue StackPtr = DAG.CreateStackTemporary(Op.getValueType(), DestVT); in CreateStackStoreLoad()
895 return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo(), in CreateStackStoreLoad()
HDLegalizeVectorTypes.cpp231 EVT DestVT = N->getValueType(0).getVectorElementType(); in ScalarizeVecRes_UnaryOp() local
233 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op); in ScalarizeVecRes_UnaryOp()
951 EVT DestVT = N->getValueType(0); in SplitVecRes_ExtendOp() local
953 llvm::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(DestVT); in SplitVecRes_ExtendOp()
970 SrcVT.getSizeInBits() * 2 < DestVT.getSizeInBits()) { in SplitVecRes_ExtendOp()
HDLegalizeTypes.h154 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
/trueos/contrib/llvm/lib/CodeGen/
HDTargetLoweringBase.cpp876 MVT DestVT = TLI->getRegisterType(NewVT); in getVectorTypeBreakdownMVT() local
877 RegisterVT = DestVT; in getVectorTypeBreakdownMVT()
878 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdownMVT()
879 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits()); in getVectorTypeBreakdownMVT()
1163 MVT DestVT = getRegisterType(Context, NewVT); in getVectorTypeBreakdown() local
1164 RegisterVT = DestVT; in getVectorTypeBreakdown()
1171 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16. in getVectorTypeBreakdown()
1172 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits()); in getVectorTypeBreakdown()
/trueos/contrib/llvm/include/llvm/Target/
HDTargetLowering.h1051 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() argument
1052 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; in AddPromotedToType()
/trueos/contrib/llvm/lib/Target/X86/
HDX86ISelLowering.cpp8673 EVT DestVT = Op.getValueType(); in LowerUINT_TO_FP_i32() local
8675 if (DestVT.bitsLT(MVT::f64)) in LowerUINT_TO_FP_i32()
8676 return DAG.getNode(ISD::FP_ROUND, dl, DestVT, Sub, in LowerUINT_TO_FP_i32()
8678 if (DestVT.bitsGT(MVT::f64)) in LowerUINT_TO_FP_i32()
8679 return DAG.getNode(ISD::FP_EXTEND, dl, DestVT, Sub); in LowerUINT_TO_FP_i32()