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Searched refs:CS0 (Results 1 – 25 of 31) sorted by relevance

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/trueos/sys/gnu/dts/arm/
HDomap2420-n8x0-common.dtsi43 ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
50 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
HDdm8168-evm.dts59 ranges = <0 0 0x04000000 0x01000000>; /* CS0: 16MB for NAND */
63 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDomap3-devkit8000.dts109 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
112 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDomap3-n950-n9.dtsi123 ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */
128 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
HDimx6dl-riotboard.dts350 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x000b1 /* CS0 */
359 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x000b1 /* CS0 */
369 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 /* CS0 */
HDomap3-evm-37xx.dts157 ranges = <0 0 0x00000000 0x1000000>, /* CS0: 16MB for NAND */
162 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDomap3-panel-sharp-ls037v7dw01.dtsi58 reg = <0>; /* CS0 */
HDam335x-igep0033.dtsi129 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
132 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDomap3-cm-t3x.dtsi222 reg = <0>; /* CS0 */
267 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDimx27-pdk.dts131 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */
HDomap3-lilly-a83x.dtsi313 reg = <0>; /* CS0 */
366 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDomap3-gta04.dtsi465 ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
468 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDomap3-overo-common-lcd35.dtsi149 reg = <0>; /* CS0 */
HDomap3-overo-common-lcd43.dtsi161 reg = <0>; /* CS0 */
HDimx27-eukrea-mbimxsd27-baseboard.dts170 MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* CS0 */
HDomap3-igep.dtsi106 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDimx51-eukrea-mbimxsd51-baseboard.dts165 MX51_PAD_CSPI1_SS0__GPIO4_24 0x80000000 /* CS0 */
HDam335x-evm.dts447 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
449 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDimx27-phytec-phycore-som.dtsi220 MX27_PAD_CSPI1_SS0__GPIO4_28 0x0 /* SPI1 CS0 */
HDam43x-epos-evm.dts477 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
479 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
HDimx51-digi-connectcore-som.dtsi240 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 /* CS0 */
HDda850.dtsi125 /* CS0 */
HDomap3-ldp.dts105 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
/trueos/sys/dev/cx/
HDcsigma.c285 if (c0 && ! cx_probe_chip (CS0(port))) in cx_probe_board()
290 else if (c2 && ! cx_probe_chip (CS0(port + 0x10))) in cx_probe_board()
350 port = ((rev & BSR_VAR_MASK) != CRONYX_400) ? CS0(b->port) : CS1(b->port); in cx_probe_irq()
383 port = ((rev & BSR_VAR_MASK) != CRONYX_400) ? CS0(port) : CS1(port); in cx_chip_revision()
551 b->chan[i+0].port = CS0(port); in cx_init_board()
554 b->chan[i+8].port = CS0(port+0x10); in cx_init_board()
778 b->chan[i+0].port = CS0(port); in cx_init_800()
781 b->chan[i+8].port = CS0(port+0x10); in cx_init_800()
835 b->chan[i+0].port = CS0(port); in cx_init_2x()
837 b->chan[i+8].port = CS0(port+0x10); in cx_init_2x()
HDcxreg.h25 #define CS0(p) ((p) | 0x8000) /* chip select 0 */ macro

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