Home
last modified time | relevance | path

Searched refs:CCState (Results 1 – 25 of 28) sorted by relevance

12

/trueos/contrib/llvm/lib/CodeGen/
HDCallingConvLower.cpp26 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf, in CCState() function in CCState
42 void CCState::HandleByVal(unsigned ValNo, MVT ValVT, in HandleByVal()
59 void CCState::MarkAllocated(unsigned Reg) { in MarkAllocated()
67 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeFormalArguments()
86 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in CheckReturn()
100 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeReturn()
118 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs, in AnalyzeCallOperands()
136 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs, in AnalyzeCallOperands()
155 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, in AnalyzeCallResult()
172 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { in AnalyzeCallResult()
/trueos/contrib/llvm/lib/Target/ARM/
HDARMCallingConv.h30 CCState &State, bool CanFail) { in f64AssignAPCS()
61 CCState &State) { in CC_ARM_APCS_Custom_f64()
73 CCState &State, bool CanFail) { in f64AssignAAPCS()
115 CCState &State) { in CC_ARM_AAPCS_Custom_f64()
125 CCValAssign::LocInfo &LocInfo, CCState &State) { in f64RetAssign()
147 CCState &State) { in RetCC_ARM_APCS_Custom_f64()
158 CCState &State) { in RetCC_ARM_AAPCS_Custom_f64()
HDARMISelLowering.h487 int StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
496 void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
501 void computeRegArea(CCState &CCInfo, MachineFunction &MF,
512 virtual void HandleByVal(CCState *, unsigned &, unsigned) const;
HDARMFastISel.cpp1965 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, ArgLocs, *Context); in ProcessCallArgs()
2109 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, RVLocs, *Context); in FinishCall()
2169 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, TM, ValLocs,I->getContext()); in SelectRet()
2273 CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context); in ARMEmitLibcall()
2384 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, RVLocs, *Context); in SelectCall()
/trueos/contrib/llvm/include/llvm/CodeGen/
HDCallingConvLower.h28 class CCState; variable
137 ISD::ArgFlagsTy ArgFlags, CCState &State);
144 ISD::ArgFlagsTy &ArgFlags, CCState &State);
154 class CCState {
221 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
/trueos/contrib/llvm/lib/Target/Hexagon/
HDHexagonISelLowering.cpp47 class HexagonCCState : public CCState {
54 : CCState(CC, isVarArg, MF, TM, locs, C), in HexagonCCState()
65 ISD::ArgFlagsTy ArgFlags, CCState &State);
70 ISD::ArgFlagsTy ArgFlags, CCState &State);
75 ISD::ArgFlagsTy ArgFlags, CCState &State);
80 ISD::ArgFlagsTy ArgFlags, CCState &State);
85 ISD::ArgFlagsTy ArgFlags, CCState &State);
90 ISD::ArgFlagsTy ArgFlags, CCState &State);
95 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon_VarArg()
145 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon()
[all …]
/trueos/contrib/llvm/lib/Target/X86/
HDX86CallingConv.h25 CCState &) { in CC_X86_AnyReg_Error() argument
HDX86FastISel.cpp809 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, TM, ValLocs, in X86SelectRet()
2029 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, ArgLocs, in DoSelectCall()
2257 CCState CCRetInfo(CC, false, *FuncInfo.MF, TM, RVLocs, in DoSelectCall()
/trueos/contrib/llvm/lib/Target/MSP430/
HDMSP430ISelLowering.cpp269 static void AnalyzeVarArgs(CCState &State, in AnalyzeVarArgs()
274 static void AnalyzeVarArgs(CCState &State, in AnalyzeVarArgs()
284 static void AnalyzeArguments(CCState &State, in AnalyzeArguments()
349 static void AnalyzeRetResult(CCState &State, in AnalyzeRetResult()
354 static void AnalyzeRetResult(CCState &State, in AnalyzeRetResult()
360 static void AnalyzeReturnValues(CCState &State, in AnalyzeReturnValues()
443 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCCCArguments()
539 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerReturn()
589 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCCCCallTo()
726 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCallResult()
/trueos/contrib/llvm/lib/Target/PowerPC/
HDPPCISelLowering.h642 CCState &State);
648 CCState &State);
654 CCState &State);
HDPPCFastISel.cpp1197 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, TM, ArgLocs, *Context); in processCallArgs()
1303 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, TM, RVLocs, *Context); in finishCall()
1393 CCState CCInfo(CC, IsVarArg, *FuncInfo.MF, TM, RVLocs, *Context); in SelectCall()
1516 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, TM, ValLocs, *Context); in SelectRet()
HDPPCISelLowering.cpp1852 CCState &State) { in CC_PPC32_SVR4_Custom_Dummy()
1860 CCState &State) { in CC_PPC32_SVR4_Custom_AlignArgRegs()
1887 CCState &State) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
2004 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerFormalArguments_32SVR4()
2065 CCState CCByValInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerFormalArguments_32SVR4()
3380 CCState CCRetInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCallResult()
3584 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCall_32SVR4()
3624 CCState CCByValInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCall_32SVR4()
4521 CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), in CanLowerReturn()
4534 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerReturn()
/trueos/contrib/llvm/lib/Target/Mips/
HDMipsISelLowering.h346 MipsCC(CallingConv::ID CallConv, bool IsO32, bool IsFP64, CCState &Info,
365 const CCState &getCCInfo() const { return CCInfo; } in getCCInfo()
418 CCState &CCInfo;
HDMipsISelLowering.cpp2126 CCState &State, const uint16_t *F64Regs) { in CC_MipsO32()
2202 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32()
2210 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64()
2323 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerCall()
2521 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerCallResult()
2568 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerFormalArguments()
2700 CCState CCInfo(CallConv, IsVarArg, MF, getTargetMachine(), in CanLowerReturn()
2717 CCState CCInfo(CallConv, IsVarArg, MF, getTargetMachine(), RVLocs, in LowerReturn()
3228 CallingConv::ID CC, bool IsO32_, bool IsFP64_, CCState &Info, in MipsCC()
3578 const CCState &CCInfo = CC.getCCInfo(); in writeVarArgRegs()
/trueos/contrib/llvm/patches/
HDpatch-r262261-llvm-r198149-sparc.diff14 CCState RVInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(),
HDpatch-r262261-llvm-r198145-sparc.diff53 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
/trueos/contrib/llvm/lib/Target/R600/
HDAMDGPUISelLowering.h71 void AnalyzeFormalArguments(CCState &State,
HDAMDGPUISelLowering.cpp34 ISD::ArgFlagsTy ArgFlags, CCState &State) { in allocateStack()
234 void AMDGPUTargetLowering::AnalyzeFormalArguments(CCState &State, in AnalyzeFormalArguments()
HDSIISelLowering.cpp243 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerFormalArguments()
/trueos/contrib/llvm/lib/Target/Sparc/
HDSparcISelLowering.cpp41 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet()
54 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_f64()
83 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full()
128 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half()
193 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerReturn_32()
254 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerReturn_64()
352 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerFormalArguments_32()
550 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerFormalArguments_64()
700 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCall_32()
937 CCState RVInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCall_32()
[all …]
/trueos/contrib/llvm/lib/Target/AArch64/
HDAArch64ISelLowering.h243 void SaveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, SDLoc DL,
HDAArch64ISelLowering.cpp1034 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_AArch64NoMoreRegs()
1057 AArch64TargetLowering::SaveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, in SaveVarArgRegisters()
1143 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerFormalArguments()
1254 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerReturn()
1351 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerCall()
1590 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), in LowerCallResult()
1680 CCState CCInfo(CalleeCC, IsVarArg, DAG.getMachineFunction(), in IsEligibleForTailCallOptimization()
1693 CCState CCInfo1(CalleeCC, false, DAG.getMachineFunction(), in IsEligibleForTailCallOptimization()
1698 CCState CCInfo2(CallerCC, false, DAG.getMachineFunction(), in IsEligibleForTailCallOptimization()
1724 CCState CCInfo(CalleeCC, IsVarArg, DAG.getMachineFunction(), in IsEligibleForTailCallOptimization()
/trueos/contrib/llvm/lib/Target/XCore/
HDXCoreISelLowering.cpp921 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCCCCallTo()
1044 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCallResult()
1108 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerCCCArguments()
1266 CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), RVLocs, Context); in CanLowerReturn()
1282 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), in LowerReturn()
/trueos/contrib/llvm/include/llvm/Target/
HDTargetLowering.h42 class CCState; variable
2021 virtual void HandleByVal(CCState *, unsigned &, unsigned) const {} in HandleByVal() argument
/trueos/contrib/llvm/lib/Target/SystemZ/
HDSystemZISelLowering.cpp650 CCState CCInfo(CallConv, IsVarArg, MF, TM, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
753 static bool canUseSiblingCall(CCState ArgCCInfo, in canUseSiblingCall()
788 CCState ArgCCInfo(CallConv, IsVarArg, MF, TM, ArgLocs, *DAG.getContext()); in LowerCall()
905 CCState RetCCInfo(CallConv, IsVarArg, MF, TM, RetLocs, *DAG.getContext()); in LowerCall()
936 CCState RetCCInfo(CallConv, IsVarArg, MF, TM, RetLocs, *DAG.getContext()); in LowerReturn()

12