Searched refs:ArgRegs (Results 1 – 6 of 6) sorted by relevance
| /trueos/contrib/llvm/lib/Target/PowerPC/ |
| HD | PPCFastISel.cpp | 170 SmallVectorImpl<unsigned> &ArgRegs,
1189 SmallVectorImpl<unsigned> &ArgRegs, in processCallArgs() argument
1233 unsigned Arg = ArgRegs[VA.getValNo()]; in processCallArgs()
1407 SmallVector<unsigned, 8> ArgRegs; in SelectCall() local
1412 ArgRegs.reserve(NumArgs); in SelectCall()
1453 ArgRegs.push_back(Arg); in SelectCall()
1462 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in SelectCall()
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| HD | PPCISelLowering.cpp | 1861 static const uint16_t ArgRegs[] = { in CC_PPC32_SVR4_Custom_AlignArgRegs() local
1865 const unsigned NumArgRegs = array_lengthof(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs()
1867 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs()
1874 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignArgRegs()
1888 static const uint16_t ArgRegs[] = { in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
1893 const unsigned NumArgRegs = array_lengthof(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
1895 unsigned RegNum = State.getFirstUnallocated(ArgRegs, NumArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
1899 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
1900 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
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| /trueos/contrib/llvm/lib/Target/ARM/ |
| HD | ARMFastISel.cpp | 210 SmallVectorImpl<unsigned> &ArgRegs,
1957 SmallVectorImpl<unsigned> &ArgRegs, in ProcessCallArgs() argument
2023 unsigned Arg = ArgRegs[VA.getValNo()]; in ProcessCallArgs()
2281 SmallVector<unsigned, 8> ArgRegs; in ARMEmitLibcall() local
2285 ArgRegs.reserve(I->getNumOperands()); in ARMEmitLibcall()
2302 ArgRegs.push_back(Arg); in ARMEmitLibcall()
2310 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in ARMEmitLibcall()
2392 SmallVector<unsigned, 8> ArgRegs; in SelectCall() local
2397 ArgRegs.reserve(arg_size); in SelectCall()
2435 ArgRegs.push_back(Arg); in SelectCall()
[all …]
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| /trueos/contrib/llvm/lib/Target/XCore/ |
| HD | XCoreISelLowering.cpp | 1181 static const uint16_t ArgRegs[] = { in LowerCCCArguments() local
1185 unsigned FirstVAReg = CCInfo.getFirstUnallocated(ArgRegs, in LowerCCCArguments()
1186 array_lengthof(ArgRegs)); in LowerCCCArguments()
1187 if (FirstVAReg < array_lengthof(ArgRegs)) { in LowerCCCArguments()
1191 for (int i = array_lengthof(ArgRegs) - 1; i >= (int)FirstVAReg; --i) { in LowerCCCArguments()
1201 RegInfo.addLiveIn(ArgRegs[i], VReg); in LowerCCCArguments()
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| /trueos/contrib/llvm/lib/Target/Mips/ |
| HD | MipsISelLowering.cpp | 3492 const uint16_t *ArgRegs = CC.intArgRegs(); in passByValArg() local
3504 unsigned ArgReg = ArgRegs[ByVal.FirstIdx + I]; in passByValArg()
3555 unsigned ArgReg = ArgRegs[ByVal.FirstIdx + I]; in passByValArg()
3577 const uint16_t *ArgRegs = CC.intArgRegs(); in writeVarArgRegs() local
3579 unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs, NumRegs); in writeVarArgRegs()
3605 unsigned Reg = addLiveIn(MF, ArgRegs[I], RC); in writeVarArgRegs()
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| /trueos/contrib/llvm/lib/Target/Sparc/ |
| HD | SparcISelLowering.cpp | 494 static const uint16_t ArgRegs[] = { in LowerFormalArguments_32() local
497 unsigned NumAllocated = CCInfo.getFirstUnallocated(ArgRegs, 6); in LowerFormalArguments_32()
498 const uint16_t *CurArgReg = ArgRegs+NumAllocated, *ArgRegEnd = ArgRegs+6; in LowerFormalArguments_32()
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