Searched refs:AddrBaseReg (Results 1 – 4 of 4) sorted by relevance
221 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()236 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand()251 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand()371 const MCOperand &Base = MI.getOperand(Op+X86::AddrBaseReg); in EmitMemModRMByte()705 X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()762 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()797 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
33 AddrBaseReg = 0, enumerator
615 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand()629 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()644 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand()962 if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrBaseReg).getReg())) in emitVEXOpcodePrefix()996 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in emitVEXOpcodePrefix()1016 MI.getOperand(MemOperand+X86::AddrBaseReg).getReg())) in emitVEXOpcodePrefix()
226 MachineOperand& p = MI->getOperand(AddrOffset + X86::AddrBaseReg); in processInstruction()