Searched refs:A_SGE_TIMER_VALUE_4_AND_5 (Results 1 – 2 of 2) sorted by relevance
472 t4_write_reg(sc, A_SGE_TIMER_VALUE_4_AND_5, v); in t4_tweak_chip_settings()683 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_4_AND_5); in t4_read_chip_settings()
1387 #define A_SGE_TIMER_VALUE_4_AND_5 0x10c0 macro