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Searched refs:AR_PHY_TIMING4 (Results 1 – 2 of 2) sorted by relevance

/trueos/sys/contrib/dev/ath/ath_hal/ar9300/
HDar9300_reset.c1024 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_SPUR_FILTER, 0); in ar9300_spur_mitigate_ofdm()
1033 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_SPUR_RSSI, 0); in ar9300_spur_mitigate_ofdm()
1038 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_PILOT_MASK, 0); in ar9300_spur_mitigate_ofdm()
1039 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_CHAN_MASK, 0); in ar9300_spur_mitigate_ofdm()
1101 AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_SPUR_FILTER, 0x1); in ar9300_spur_mitigate_ofdm()
1116 AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_SPUR_RSSI, 0x1); in ar9300_spur_mitigate_ofdm()
1144 AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_PILOT_MASK, 0x1); in ar9300_spur_mitigate_ofdm()
1146 AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_CHAN_MASK, 0x1); in ar9300_spur_mitigate_ofdm()
2034 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING4, in ar9300_setup_calibration()
2043 OS_REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL); in ar9300_setup_calibration()
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HDar9300phy.h46 #define AR_PHY_TIMING4 AR_CHAN_OFFSET(BB_timing_control_4) macro