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Searched refs:watermarks (Results 1 – 11 of 11) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn30/
Ddcn30_fpu.c445 …context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn30_fpu_calculate_wm_and_dlg()
446 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter… in dcn30_fpu_calculate_wm_and_dlg()
447 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->b… in dcn30_fpu_calculate_wm_and_dlg()
448 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&con… in dcn30_fpu_calculate_wm_and_dlg()
449 …context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, … in dcn30_fpu_calculate_wm_and_dlg()
450 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(&context->b… in dcn30_fpu_calculate_wm_and_dlg()
451 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(&… in dcn30_fpu_calculate_wm_and_dlg()
452 …context->bw_ctx.bw.dcn.watermarks.b.urgent_latency_ns = get_urgent_latency(&context->bw_ctx.dml, p… in dcn30_fpu_calculate_wm_and_dlg()
515 …context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn30_fpu_calculate_wm_and_dlg()
516 …context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter… in dcn30_fpu_calculate_wm_and_dlg()
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/openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn20/
Ddcn20_fpu.c1801 …context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn20_calculate_wm()
1802 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter… in dcn20_calculate_wm()
1803 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->b… in dcn20_calculate_wm()
1804 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&con… in dcn20_calculate_wm()
1805 …context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, … in dcn20_calculate_wm()
1806 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(&context->b… in dcn20_calculate_wm()
1807 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(&… in dcn20_calculate_wm()
1808 …context->bw_ctx.bw.dcn.watermarks.b.urgent_latency_ns = get_urgent_latency(&context->bw_ctx.dml, p… in dcn20_calculate_wm()
1815 …context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn20_calculate_wm()
1816 …context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter… in dcn20_calculate_wm()
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/openbsd/src/sys/dev/pci/drm/amd/display/dc/inc/hw/
Ddchubbub.h187 union dcn_watermark_set *watermarks,
/openbsd/src/sys/dev/pci/drm/amd/pm/powerplay/hwmgr/
Dsmu_helper.h45 struct watermarks { struct
Dsmu7_hwmgr.c5339 struct dm_pp_wm_sets_with_clock_ranges *watermarks = in smu7_set_watermarks_for_clocks_ranges() local
5351 for (k = 0; k < watermarks->num_wm_sets; k++) { in smu7_set_watermarks_for_clocks_ranges()
5352 if (dep_sclk_table->entries[i].clk >= watermarks->wm_clk_ranges[k].wm_min_eng_clk_in_khz / 10 && in smu7_set_watermarks_for_clocks_ranges()
5353 dep_sclk_table->entries[i].clk < watermarks->wm_clk_ranges[k].wm_max_eng_clk_in_khz / 10 && in smu7_set_watermarks_for_clocks_ranges()
5354 dep_mclk_table->entries[i].clk >= watermarks->wm_clk_ranges[k].wm_min_mem_clk_in_khz / 10 && in smu7_set_watermarks_for_clocks_ranges()
5355 dep_mclk_table->entries[i].clk < watermarks->wm_clk_ranges[k].wm_max_mem_clk_in_khz / 10) { in smu7_set_watermarks_for_clocks_ranges()
5357 table->DisplayWatermark[i][j] = watermarks->wm_clk_ranges[k].wm_set_id; in smu7_set_watermarks_for_clocks_ranges()
5363 table->DisplayWatermark[i][j] = watermarks->wm_clk_ranges[k - 1].wm_set_id); in smu7_set_watermarks_for_clocks_ranges()
Dsmu_helper.c719 struct watermarks *table = wt_table; in smu_set_watermarks_for_clocks_ranges()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/inc/
Dcore_types.h529 union dcn_watermark_set watermarks; member
/openbsd/src/gnu/usr.bin/cvs/src/
Doptions.h.in185 * start again. You may override the default hi/low watermarks here
/openbsd/src/gnu/llvm/llvm/docs/CommandGuide/
Dllvm-cov.rst347 Set high and low watermarks for coverage in html format output. This allows you
/openbsd/src/sys/dev/pci/drm/amd/display/dc/
Ddc_dmub_srv.c920 wm_val_refclk = context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns * in dc_dmub_setup_subvp_dmub_command()
/openbsd/src/sbin/pfctl/
Dparse.y457 struct pfctl_watermarks *watermarks; member
535 %type <v.watermarks> syncookie_opts