Searched refs:vba (Results 1 – 11 of 11) sorted by relevance
| /openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn20/ |
| D | display_mode_vba_20.c | 237 mode_lib->vba.FabricAndDRAMBandwidth = dml_min( in dml20_recalculate() 238 mode_lib->vba.DRAMSpeed * mode_lib->vba.NumberOfChannels * mode_lib->vba.DRAMChannelWidth, in dml20_recalculate() 239 mode_lib->vba.FabricClock * mode_lib->vba.FabricDatapathToDCNDataReturn) / 1000.0; in dml20_recalculate() 255 > mode_lib->vba.DCFCLK * mode_lib->vba.ReturnBusWidth / 4.0) in adjust_ReturnBW() 261 - mode_lib->vba.UrgentLatencyPixelDataOnly in adjust_ReturnBW() 262 / ((mode_lib->vba.ROBBufferSizeInKByte in adjust_ReturnBW() 263 - mode_lib->vba.PixelChunkSizeInKByte) in adjust_ReturnBW() 266 - mode_lib->vba.DCFCLK in adjust_ReturnBW() 267 * mode_lib->vba.ReturnBusWidth in adjust_ReturnBW() 269 + mode_lib->vba.UrgentLatencyPixelDataOnly)); in adjust_ReturnBW() [all …]
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| D | display_mode_vba_20v2.c | 261 mode_lib->vba.FabricAndDRAMBandwidth = dml_min( in dml20v2_recalculate() 262 mode_lib->vba.DRAMSpeed * mode_lib->vba.NumberOfChannels * mode_lib->vba.DRAMChannelWidth, in dml20v2_recalculate() 263 mode_lib->vba.FabricClock * mode_lib->vba.FabricDatapathToDCNDataReturn) / 1000.0; in dml20v2_recalculate() 279 > mode_lib->vba.DCFCLK * mode_lib->vba.ReturnBusWidth / 4.0) in adjust_ReturnBW() 285 - mode_lib->vba.UrgentLatencyPixelDataOnly in adjust_ReturnBW() 286 / ((mode_lib->vba.ROBBufferSizeInKByte in adjust_ReturnBW() 287 - mode_lib->vba.PixelChunkSizeInKByte) in adjust_ReturnBW() 290 - mode_lib->vba.DCFCLK in adjust_ReturnBW() 291 * mode_lib->vba.ReturnBusWidth in adjust_ReturnBW() 293 + mode_lib->vba.UrgentLatencyPixelDataOnly)); in adjust_ReturnBW() [all …]
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| D | dcn20_fpu.c | 1086 bool allow_z8 = context->bw_ctx.dml.vba.StutterPeriod > (double)minmum_z8_residency; in decide_zstate_support() 1096 if (is_pwrseq0 && context->bw_ctx.dml.vba.StutterPeriod > 5000.0) in decide_zstate_support() 1154 context->bw_ctx.bw.dcn.clk.dispclk_khz = context->bw_ctx.dml.vba.DISPCLK * 1000; in dcn20_calculate_dlg_params() 1155 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000; in dcn20_calculate_dlg_params() 1156 context->bw_ctx.bw.dcn.clk.socclk_khz = context->bw_ctx.dml.vba.SOCCLK * 1000; in dcn20_calculate_dlg_params() 1157 context->bw_ctx.bw.dcn.clk.dramclk_khz = context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16; in dcn20_calculate_dlg_params() 1162 context->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz = context->bw_ctx.dml.vba.DCFCLKDeepSleep * 1000; in dcn20_calculate_dlg_params() 1163 context->bw_ctx.bw.dcn.clk.fclk_khz = context->bw_ctx.dml.vba.FabricClock * 1000; in dcn20_calculate_dlg_params() 1165 context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] in dcn20_calculate_dlg_params() 1226 …bool cstate_en = context->bw_ctx.dml.vba.PrefetchMode[vlevel][context->bw_ctx.dml.vba.maxMpcComb] … in dcn20_calculate_dlg_params() [all …]
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| /openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/ |
| D | display_mode_vba.c | 57 bool need_recalculate = memcmp(&mode_lib->soc, &mode_lib->vba.soc, sizeof(mode_lib->vba.soc)) != 0 in dml_get_voltage_level() 58 || memcmp(&mode_lib->ip, &mode_lib->vba.ip, sizeof(mode_lib->vba.ip)) != 0 in dml_get_voltage_level() 59 || num_pipes != mode_lib->vba.cache_num_pipes in dml_get_voltage_level() 60 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level() 63 mode_lib->vba.soc = mode_lib->soc; in dml_get_voltage_level() 64 mode_lib->vba.ip = mode_lib->ip; in dml_get_voltage_level() 65 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level() 66 mode_lib->vba.cache_num_pipes = num_pipes; in dml_get_voltage_level() 79 return mode_lib->vba.VoltageLevel; in dml_get_voltage_level() 88 dml_get_attr_func(clk_dcf_deepsleep, mode_lib->vba.DCFCLKDeepSleep); [all …]
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| D | display_mode_lib.c | 291 for (i = mode_lib->vba.soc.num_states; i >= 0; i--) { in dml_log_mode_support_params() 294 …dml_print("DML SUPPORT: Mode Supported : %s\n", mode_lib->vba.ModeSupport[i][0] ?… in dml_log_mode_support_params() 295 …dml_print("DML SUPPORT: Mode Supported (pipe split) : %s\n", mode_lib->vba.ModeSupport[i][1] ?… in dml_log_mode_support_params() 296 …dml_print("DML SUPPORT: Scale Ratio And Taps : %s\n", mode_lib->vba.ScaleRatioA… in dml_log_mode_support_params() 297 …dml_print("DML SUPPORT: Source Format Pixel And Scan : %s\n", mode_lib->vba.SourceForma… in dml_log_mode_support_params() 298 … : [%s, %s]\n", mode_lib->vba.ViewportSizeSupport[i][0] ? "Supported" : "NOT Supported… in dml_log_mode_support_params() 299 …dml_print("DML SUPPORT: DIO Support : %s\n", mode_lib->vba.DIOSupport[… in dml_log_mode_support_params() 300 …dml_print("DML SUPPORT: ODM Combine 4To1 Support Check : %s\n", mode_lib->vba.ODMCombine4… in dml_log_mode_support_params() 301 …dml_print("DML SUPPORT: DSC Units : %s\n", mode_lib->vba.NotEnoughDS… in dml_log_mode_support_params() 302 …dml_print("DML SUPPORT: DSCCLK Required : %s\n", mode_lib->vba.DSCCLKRequi… in dml_log_mode_support_params() [all …]
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| D | display_mode_lib.h | 89 struct vba_vars_st vba; member
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| /openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn21/ |
| D | display_mode_vba_21.c | 1229 if (!mode_lib->vba.IgnoreViewportPositioning) { in CalculatePrefetchSourceLines() 1336 …MPDEBytesFrame = 128 * ((mode_lib->vba.GPUVMMaxPageTableLevels + 1) * (mode_lib->vba.HostVMMaxPage… in CalculateVMAndRowBytes() 1366 …if (GPUVMEnable == true && (mode_lib->vba.GPUVMMaxPageTableLevels + 1) * (mode_lib->vba.HostVMMaxP… in CalculateVMAndRowBytes() 1372 …ExtraDPDEBytesFrame = 128 * ((mode_lib->vba.GPUVMMaxPageTableLevels + 1) * (mode_lib->vba.HostVMMa… in CalculateVMAndRowBytes() 1471 struct vba_vars_st *locals = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1474 mode_lib->vba.WritebackDISPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1475 mode_lib->vba.DISPCLKWithRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1476 mode_lib->vba.DISPCLKWithoutRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1477 mode_lib->vba.GlobalDPPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1481 for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() [all …]
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| /openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn30/ |
| D | dcn30_fpu.c | 362 …wb_arb_params->dram_speed_change_duration = dml->vba.WritebackAllowDRAMClockChangeEndPosition[cur_… in dcn30_fpu_set_mcif_arb_params() 385 int maxMpcComb = context->bw_ctx.dml.vba.maxMpcComb; in dcn30_fpu_calculate_wm_and_dlg() 387 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][maxMpcComb]; in dcn30_fpu_calculate_wm_and_dlg() 388 …bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clo… in dcn30_fpu_calculate_wm_and_dlg() 419 maxMpcComb = context->bw_ctx.dml.vba.maxMpcComb; in dcn30_fpu_calculate_wm_and_dlg() 420 dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn30_fpu_calculate_wm_and_dlg() 421 …pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_ch… in dcn30_fpu_calculate_wm_and_dlg() 484 unsigned int min_dram_speed_mts = context->bw_ctx.dml.vba.DRAMSpeed; in dcn30_fpu_calculate_wm_and_dlg() 490 if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] == in dcn30_fpu_calculate_wm_and_dlg() 548 context->perf_params.stutter_period_us = context->bw_ctx.dml.vba.StutterPeriod; in dcn30_fpu_calculate_wm_and_dlg() [all …]
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| D | display_mode_vba_30.c | 1630 if (!mode_lib->vba.IgnoreViewportPositioning) { in CalculatePrefetchSourceLines() 1734 MPDEBytesFrame = 128 * (mode_lib->vba.GPUVMMaxPageTableLevels - 1); in CalculateVMAndRowBytes() 1755 if (GPUVMEnable == true && mode_lib->vba.GPUVMMaxPageTableLevels > 1) { in CalculateVMAndRowBytes() 1761 ExtraDPDEBytesFrame = 128 * (mode_lib->vba.GPUVMMaxPageTableLevels - 2); in CalculateVMAndRowBytes() 1857 struct vba_vars_st *v = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 3074 for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) { in DisplayPipeConfiguration() 3077 mode_lib->vba.SourcePixelFormat[k], in DisplayPipeConfiguration() 3078 mode_lib->vba.SurfaceTiling[k], in DisplayPipeConfiguration() 3090 mode_lib->vba.NumberOfActivePlanes, in DisplayPipeConfiguration() 3091 mode_lib->vba.DETBufferSizeInKByte[0], in DisplayPipeConfiguration() [all …]
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| /openbsd/src/sys/dev/pci/drm/amd/display/dc/core/ |
| D | dc_hw_sequencer.c | 505 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in set_p_state_switch_method() local 508 if (!dc->ctx || !dc->ctx->dmub_srv || !pipe_ctx || !vba) in set_p_state_switch_method() 511 if (vba->DRAMClockChangeSupport[vba->VoltageLevel][vba->maxMpcComb] != in set_p_state_switch_method()
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| /openbsd/src/sys/dev/tc/ |
| D | tcdevs | 66 device PMABV-AA vba VME Adapter
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