| /openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/ |
| D | display_mode_vba.c | 57 bool need_recalculate = memcmp(&mode_lib->soc, &mode_lib->vba.soc, sizeof(mode_lib->vba.soc)) != 0 in dml_get_voltage_level()
63 mode_lib->vba.soc = mode_lib->soc; in dml_get_voltage_level()
306 soc_bounding_box_st *soc = &mode_lib->vba.soc; in fetch_socbb_params() local
310 mode_lib->vba.ReturnBusWidth = soc->return_bus_width_bytes; in fetch_socbb_params()
311 mode_lib->vba.NumberOfChannels = soc->num_chans; in fetch_socbb_params()
313 …soc->pct_ideal_dram_sdp_bw_after_urgent_pixel_only; // there's always that one bastard variable th… in fetch_socbb_params()
315 soc->pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm; in fetch_socbb_params()
317 soc->pct_ideal_dram_sdp_bw_after_urgent_vm_only; in fetch_socbb_params()
319 soc->max_avg_sdp_bw_use_normal_percent; in fetch_socbb_params()
321 soc->max_avg_dram_bw_use_normal_percent; in fetch_socbb_params()
[all …]
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| D | dml1_display_rq_dlg_calc.c | 479 log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); in dml1_rq_dlg_get_row_heights()
767 vmpg_bytes = mode_lib->soc.vmm_page_size_bytes; in get_surf_rq_param()
796 log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); in get_surf_rq_param()
1303 line_wait = mode_lib->soc.urgent_latency_us; in dml1_rq_dlg_get_dlg_params()
1305 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml1_rq_dlg_get_dlg_params()
1308 mode_lib->soc.dram_clock_change_latency_us in dml1_rq_dlg_get_dlg_params()
1309 + mode_lib->soc.urgent_latency_us, in dml1_rq_dlg_get_dlg_params()
1320 (double) mode_lib->soc.sr_enter_plus_exit_time_us); in dml1_rq_dlg_get_dlg_params()
1324 (double) mode_lib->soc.dram_clock_change_latency_us); in dml1_rq_dlg_get_dlg_params()
1328 mode_lib->soc.urgent_latency_us); in dml1_rq_dlg_get_dlg_params()
[all …]
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| D | display_mode_lib.h | 87 struct _vcs_dpi_soc_bounding_box_st soc; member
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| D | display_mode_lib.c | 98 lib->soc = *soc_bb; in dml_init_instance()
291 for (i = mode_lib->vba.soc.num_states; i >= 0; i--) { in dml_log_mode_support_params()
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| D | display_mode_vba.h | 261 soc_bounding_box_st soc; member
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| /openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn30/ |
| D | dcn30_fpu.c | 372 context->bw_ctx.dml.soc.dram_clock_change_latency_us == 0) in dcn30_fpu_update_soc_for_wm_a()
373 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries… in dcn30_fpu_update_soc_for_wm_a()
374 …context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[W… in dcn30_fpu_update_soc_for_wm_a()
375 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_in… in dcn30_fpu_update_soc_for_wm_a()
417 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries… in dcn30_fpu_calculate_wm_and_dlg()
425 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn30_fpu_calculate_wm_and_dlg()
426 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn30_fpu_calculate_wm_and_dlg()
430 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn30_fpu_calculate_wm_and_dlg()
439 pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dcfclk_mhz; in dcn30_fpu_calculate_wm_and_dlg()
441 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries… in dcn30_fpu_calculate_wm_and_dlg()
[all …]
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| D | display_rq_dlg_calc_30.c | 341 const unsigned int log2_vmpg_bytes = dml_log2(mode_lib->soc.gpuvm_min_page_size_bytes); in get_meta_and_pte_attr()
509 vmpg_bytes = mode_lib->soc.gpuvm_min_page_size_bytes; in get_meta_and_pte_attr()
1239 line_wait = mode_lib->soc.urgent_latency_pixel_data_only_us; in dml_rq_dlg_get_dlg_params()
1241 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml_rq_dlg_get_dlg_params()
1243 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us in dml_rq_dlg_get_dlg_params()
1244 …+ mode_lib->soc.urgent_latency_pixel_data_only_us, // TODO: Should this be urgent_latency_pixel_mi… in dml_rq_dlg_get_dlg_params()
1437 ref_cycles = (levels * mode_lib->soc.urgent_latency_vm_data_only_us) * refclk_freq_in_mhz; in dml_rq_dlg_get_dlg_params()
1439 ref_cycles, levels, mode_lib->soc.urgent_latency_vm_data_only_us, refclk_freq_in_mhz); in dml_rq_dlg_get_dlg_params()
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| D | display_mode_vba_30.c | 1992 v->soc.clock_limits[mode_lib->soc.num_states - 1].dispclk_mhz, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3558 start_state = v->soc.num_states - 1; in dml30_ModeSupportAndSystemConfigurationFull()
3860 for (i = start_state; i < v->soc.num_states; i++) { in dml30_ModeSupportAndSystemConfigurationFull()
3869 …utODMCombine >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1] in dml30_ModeSupportAndSystemConfigurationFull()
3870 && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) { in dml30_ModeSupportAndSystemConfigurationFull()
3875 …MCombine2To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1] in dml30_ModeSupportAndSystemConfigurationFull()
3876 && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) { in dml30_ModeSupportAndSystemConfigurationFull()
3881 …MCombine4To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1] in dml30_ModeSupportAndSystemConfigurationFull()
3882 && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) { in dml30_ModeSupportAndSystemConfigurationFull()
3990 …if (!(v->MaxDispclk[i] == v->MaxDispclk[v->soc.num_states - 1] && v->MaxDppclk[i] == v->MaxDppclk[… in dml30_ModeSupportAndSystemConfigurationFull()
[all …]
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| /openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn20/ |
| D | dcn20_fpu.c | 1219 …context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel]… in dcn20_calculate_dlg_params()
1220 …context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz = context->bw_ctx.dml.soc.clock_limits[vlevel… in dcn20_calculate_dlg_params()
1769 pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dispclk_mhz; in dcn20_calculate_wm()
1770 pipes[pipe_cnt].clks_cfg.dppclk_mhz = context->bw_ctx.dml.soc.clock_limits[0].dppclk_mhz; in dcn20_calculate_wm()
1792 pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].dcfclk_mhz; in dcn20_calculate_wm()
1793 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[vlevel].socclk_mhz; in dcn20_calculate_wm()
1798 pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[1].dcfclk_mhz; in dcn20_calculate_wm()
1799 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[1].socclk_mhz; in dcn20_calculate_wm()
1812 pipes[0].clks_cfg.dcfclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].dcfclk_mhz; in dcn20_calculate_wm()
1813 pipes[0].clks_cfg.socclk_mhz = context->bw_ctx.dml.soc.clock_limits[2].socclk_mhz; in dcn20_calculate_wm()
[all …]
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| D | display_rq_dlg_calc_20.c | 393 const unsigned int log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); in get_meta_and_pte_attr()
534 vmpg_bytes = mode_lib->soc.vmm_page_size_bytes; in get_meta_and_pte_attr()
1083 line_wait = mode_lib->soc.urgent_latency_us; in dml20_rq_dlg_get_dlg_params()
1085 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml20_rq_dlg_get_dlg_params()
1087 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us in dml20_rq_dlg_get_dlg_params()
1088 + mode_lib->soc.urgent_latency_us, in dml20_rq_dlg_get_dlg_params()
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| D | display_rq_dlg_calc_20v2.c | 393 const unsigned int log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); in get_meta_and_pte_attr()
534 vmpg_bytes = mode_lib->soc.vmm_page_size_bytes; in get_meta_and_pte_attr()
1084 line_wait = mode_lib->soc.urgent_latency_us; in dml20v2_rq_dlg_get_dlg_params()
1086 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml20v2_rq_dlg_get_dlg_params()
1088 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us in dml20v2_rq_dlg_get_dlg_params()
1089 + mode_lib->soc.urgent_latency_us, in dml20v2_rq_dlg_get_dlg_params()
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| D | display_mode_vba_20.c | 1260 mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states].dispclk_mhz, in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2598 for (k = 0; k <= mode_lib->vba.soc.num_states; k++) in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3441 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
3523 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
3874 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
3889 && i == mode_lib->vba.soc.num_states) in dml20_ModeSupportAndSystemConfigurationFull()
3896 && i == mode_lib->vba.soc.num_states) in dml20_ModeSupportAndSystemConfigurationFull()
3970 if (i != mode_lib->vba.soc.num_states) { in dml20_ModeSupportAndSystemConfigurationFull()
4002 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
4019 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
[all …]
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| D | display_mode_vba_20v2.c | 1320 mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states].dispclk_mhz, in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2671 for (k = 0; k <= mode_lib->vba.soc.num_states; k++) in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3548 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20v2_ModeSupportAndSystemConfigurationFull()
3630 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20v2_ModeSupportAndSystemConfigurationFull()
3981 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20v2_ModeSupportAndSystemConfigurationFull()
3983 mode_lib->vba.MaxDispclk[mode_lib->vba.soc.num_states], in dml20v2_ModeSupportAndSystemConfigurationFull()
4000 && i == mode_lib->vba.soc.num_states) in dml20v2_ModeSupportAndSystemConfigurationFull()
4007 && i == mode_lib->vba.soc.num_states) in dml20v2_ModeSupportAndSystemConfigurationFull()
4084 if (i != mode_lib->vba.soc.num_states) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4116 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20v2_ModeSupportAndSystemConfigurationFull()
[all …]
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| /openbsd/src/sys/arch/octeon/dev/ |
| D | octeon_iobus.c | 182 int soc; in iobusattach() local
200 if ((soc = OF_finddevice("/soc")) != -1) { in iobusattach()
203 fa.fa_node = soc; in iobusattach()
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| /openbsd/src/sys/dev/fdt/ |
| D | cwfg.c | 217 uint8_t mode, soc; in cwfg_init() local
238 if ((error = cwfg_read(sc, SOC_HI_REG, &soc)) != 0) in cwfg_init()
240 if (soc != 0xff) in cwfg_init()
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| /openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn21/ |
| D | display_rq_dlg_calc_21.c | 383 const unsigned int log2_vmpg_bytes = dml_log2(mode_lib->soc.vmm_page_size_bytes); in get_meta_and_pte_attr()
528 vmpg_bytes = mode_lib->soc.vmm_page_size_bytes; in get_meta_and_pte_attr()
1130 line_wait = mode_lib->soc.urgent_latency_pixel_data_only_us; in dml_rq_dlg_get_dlg_params()
1132 line_wait = dml_max(mode_lib->soc.sr_enter_plus_exit_time_us, line_wait); in dml_rq_dlg_get_dlg_params()
1135 mode_lib->soc.dram_clock_change_latency_us in dml_rq_dlg_get_dlg_params()
1136 …+ mode_lib->soc.urgent_latency_pixel_data_only_us, // TODO: Should this be urgent_latency_pixel_mi… in dml_rq_dlg_get_dlg_params()
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| D | display_mode_vba_21.c | 1644 mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states - 1].dispclk_mhz, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3674 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
3716 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
4070 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
4072 mode_lib->vba.MaxDispclk[mode_lib->vba.soc.num_states], in dml21_ModeSupportAndSystemConfigurationFull()
4094 && i == mode_lib->vba.soc.num_states) in dml21_ModeSupportAndSystemConfigurationFull()
4101 && i == mode_lib->vba.soc.num_states) in dml21_ModeSupportAndSystemConfigurationFull()
4178 if (i != mode_lib->vba.soc.num_states) { in dml21_ModeSupportAndSystemConfigurationFull()
4210 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
4227 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
[all …]
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| /openbsd/src/sys/arch/octeon/octeon/ |
| D | cn3xxx.dts | 41 soc@0 {
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| /openbsd/src/lib/libc/time/ |
| D | Theory | 462 Newsgroups: soc.genealogy.german
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| /openbsd/src/sys/dev/pci/drm/ |
| D | files.drm | 499 file dev/pci/drm/i915/soc/intel_dram.c inteldrm
500 file dev/pci/drm/i915/soc/intel_gmch.c inteldrm
501 file dev/pci/drm/i915/soc/intel_pch.c inteldrm
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| /openbsd/src/share/dict/ |
| D | web2 | 184331 soc
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| /openbsd/src/games/fortune/datfiles/ |
| D | fortunes2 | 12030 soc.culture.polish. But that group doesn't exist, so cross-post to
|