| /openbsd/src/sys/dev/pci/drm/amd/amdgpu/ |
| D | amdgpu_ring.c | 81 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned int ndw) in amdgpu_ring_alloc() argument
85 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc()
90 if (WARN_ON_ONCE(ndw > ring->max_dw)) in amdgpu_ring_alloc()
93 ring->count_dw = ndw; in amdgpu_ring_alloc()
94 ring->wptr_old = ring->wptr; in amdgpu_ring_alloc()
96 if (ring->funcs->begin_use) in amdgpu_ring_alloc()
97 ring->funcs->begin_use(ring); in amdgpu_ring_alloc()
109 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) in amdgpu_ring_insert_nop() argument
114 amdgpu_ring_write(ring, ring->funcs->nop); in amdgpu_ring_insert_nop()
125 void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in amdgpu_ring_generic_pad_ib() argument
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| D | jpeg_v1_0.c | 37 static void jpeg_v1_0_ring_begin_use(struct amdgpu_ring *ring);
42 static void jpeg_v1_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_… in jpeg_v1_0_decode_ring_patch_wreg() argument
44 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_patch_wreg()
45 …ring->ring[(*ptr)++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACK… in jpeg_v1_0_decode_ring_patch_wreg()
48 ring->ring[(*ptr)++] = 0; in jpeg_v1_0_decode_ring_patch_wreg()
49 ring->ring[(*ptr)++] = PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
51 ring->ring[(*ptr)++] = reg_offset; in jpeg_v1_0_decode_ring_patch_wreg()
52 ring->ring[(*ptr)++] = PACKETJ(0, 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
54 ring->ring[(*ptr)++] = val; in jpeg_v1_0_decode_ring_patch_wreg()
57 static void jpeg_v1_0_decode_ring_set_patch_ring(struct amdgpu_ring *ring, uint32_t ptr) in jpeg_v1_0_decode_ring_set_patch_ring() argument
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| D | amdgpu_fence.c | 56 struct amdgpu_ring *ring; member
108 static void amdgpu_fence_write(struct amdgpu_ring *ring, u32 seq) in amdgpu_fence_write() argument
110 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
124 static u32 amdgpu_fence_read(struct amdgpu_ring *ring) in amdgpu_fence_read() argument
126 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_read()
148 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **f, struct amdgpu_job *job, in amdgpu_fence_emit() argument
151 struct amdgpu_device *adev = ring->adev; in amdgpu_fence_emit()
168 am_fence->ring = ring; in amdgpu_fence_emit()
174 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit()
183 &ring->fence_drv.lock, in amdgpu_fence_emit()
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| D | amdgpu_ib.c | 126 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned int num_ibs, in amdgpu_ib_schedule() argument
130 struct amdgpu_device *adev = ring->adev; in amdgpu_ib_schedule()
168 if (!ring->sched.ready && !ring->is_mes_queue) { in amdgpu_ib_schedule()
169 dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
173 if (vm && !job->vmid && !ring->is_mes_queue) { in amdgpu_ib_schedule()
179 (!ring->funcs->secure_submission_supported)) { in amdgpu_ib_schedule()
180 dev_err(adev->dev, "secure submissions not supported on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
184 alloc_size = ring->funcs->emit_frame_size + num_ibs * in amdgpu_ib_schedule()
185 ring->funcs->emit_ib_size; in amdgpu_ib_schedule()
187 r = amdgpu_ring_alloc(ring, alloc_size); in amdgpu_ib_schedule()
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| D | amdgpu_ring_mux.c | 44 struct amdgpu_ring *ring) in amdgpu_ring_mux_sw_entry() argument
46 return ring->entry_index < mux->ring_entry_size ? in amdgpu_ring_mux_sw_entry()
47 &mux->ring_entry[ring->entry_index] : NULL; in amdgpu_ring_mux_sw_entry()
52 struct amdgpu_ring *ring, in amdgpu_ring_mux_copy_pkt_from_sw_ring() argument
58 start = s_start & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring()
59 end = s_end & ring->buf_mask; in amdgpu_ring_mux_copy_pkt_from_sw_ring()
66 amdgpu_ring_alloc(real_ring, (ring->ring_size >> 2) + end - start); in amdgpu_ring_mux_copy_pkt_from_sw_ring()
67 amdgpu_ring_write_multiple(real_ring, (void *)&ring->ring[start], in amdgpu_ring_mux_copy_pkt_from_sw_ring()
68 (ring->ring_size >> 2) - start); in amdgpu_ring_mux_copy_pkt_from_sw_ring()
69 amdgpu_ring_write_multiple(real_ring, (void *)&ring->ring[0], end); in amdgpu_ring_mux_copy_pkt_from_sw_ring()
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| D | amdgpu_ring.h | 131 void amdgpu_fence_driver_clear_job_fences(struct amdgpu_ring *ring);
132 void amdgpu_fence_driver_set_error(struct amdgpu_ring *ring, int error);
133 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
135 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring);
136 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
143 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, struct amdgpu_job *job,
145 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
147 bool amdgpu_fence_process(struct amdgpu_ring *ring);
148 int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
149 signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring,
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| D | jpeg_v2_0.c | 71 struct amdgpu_ring *ring; in jpeg_v2_0_sw_init() local
88 ring = adev->jpeg.inst->ring_dec; in jpeg_v2_0_sw_init()
89 ring->use_doorbell = true; in jpeg_v2_0_sw_init()
90 ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 1; in jpeg_v2_0_sw_init()
91 ring->vm_hub = AMDGPU_MMHUB0(0); in jpeg_v2_0_sw_init()
92 snprintf(ring->name, sizeof(ring->name), "jpeg_dec"); in jpeg_v2_0_sw_init()
93 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, in jpeg_v2_0_sw_init()
134 struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec; in jpeg_v2_0_hw_init() local
136 adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, in jpeg_v2_0_hw_init()
139 return amdgpu_ring_test_helper(ring); in jpeg_v2_0_hw_init()
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| D | uvd_v7_0.c | 71 static uint64_t uvd_v7_0_ring_get_rptr(struct amdgpu_ring *ring) in uvd_v7_0_ring_get_rptr() argument
73 struct amdgpu_device *adev = ring->adev; in uvd_v7_0_ring_get_rptr()
75 return RREG32_SOC15(UVD, ring->me, mmUVD_RBC_RB_RPTR); in uvd_v7_0_ring_get_rptr()
85 static uint64_t uvd_v7_0_enc_ring_get_rptr(struct amdgpu_ring *ring) in uvd_v7_0_enc_ring_get_rptr() argument
87 struct amdgpu_device *adev = ring->adev; in uvd_v7_0_enc_ring_get_rptr()
89 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_rptr()
90 return RREG32_SOC15(UVD, ring->me, mmUVD_RB_RPTR); in uvd_v7_0_enc_ring_get_rptr()
92 return RREG32_SOC15(UVD, ring->me, mmUVD_RB_RPTR2); in uvd_v7_0_enc_ring_get_rptr()
102 static uint64_t uvd_v7_0_ring_get_wptr(struct amdgpu_ring *ring) in uvd_v7_0_ring_get_wptr() argument
104 struct amdgpu_device *adev = ring->adev; in uvd_v7_0_ring_get_wptr()
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| D | amdgpu_vpe.c | 123 struct amdgpu_device *adev = vpe->ring.adev; in amdgpu_vpe_configure_dpm()
233 struct amdgpu_device *adev = vpe->ring.adev; in amdgpu_vpe_init_microcode()
274 struct amdgpu_ring *ring = &vpe->ring; in amdgpu_vpe_ring_init() local
277 ring->ring_obj = NULL; in amdgpu_vpe_ring_init()
278 ring->use_doorbell = true; in amdgpu_vpe_ring_init()
279 ring->vm_hub = AMDGPU_MMHUB0(0); in amdgpu_vpe_ring_init()
280 ring->doorbell_index = (adev->doorbell_index.vpe_ring << 1); in amdgpu_vpe_ring_init()
281 snprintf(ring->name, 4, "vpe"); in amdgpu_vpe_ring_init()
283 ret = amdgpu_ring_init(adev, ring, 1024, &vpe->trap_irq, 0, in amdgpu_vpe_ring_init()
293 amdgpu_ring_fini(&vpe->ring); in amdgpu_vpe_ring_fini()
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| D | vcn_sw_ring.c | 27 void vcn_dec_sw_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, in vcn_dec_sw_ring_emit_fence() argument
32 amdgpu_ring_write(ring, VCN_DEC_SW_CMD_FENCE); in vcn_dec_sw_ring_emit_fence()
33 amdgpu_ring_write(ring, addr); in vcn_dec_sw_ring_emit_fence()
34 amdgpu_ring_write(ring, upper_32_bits(addr)); in vcn_dec_sw_ring_emit_fence()
35 amdgpu_ring_write(ring, seq); in vcn_dec_sw_ring_emit_fence()
36 amdgpu_ring_write(ring, VCN_DEC_SW_CMD_TRAP); in vcn_dec_sw_ring_emit_fence()
39 void vcn_dec_sw_ring_insert_end(struct amdgpu_ring *ring) in vcn_dec_sw_ring_insert_end() argument
41 amdgpu_ring_write(ring, VCN_DEC_SW_CMD_END); in vcn_dec_sw_ring_insert_end()
44 void vcn_dec_sw_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, in vcn_dec_sw_ring_emit_ib() argument
49 amdgpu_ring_write(ring, VCN_DEC_SW_CMD_IB); in vcn_dec_sw_ring_emit_ib()
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| D | jpeg_v4_0_3.c | 49 static void jpeg_v4_0_3_dec_ring_set_wptr(struct amdgpu_ring *ring);
98 struct amdgpu_ring *ring; in jpeg_v4_0_3_sw_init() local
121 ring = &adev->jpeg.inst[i].ring_dec[j]; in jpeg_v4_0_3_sw_init()
122 ring->use_doorbell = true; in jpeg_v4_0_3_sw_init()
123 ring->vm_hub = AMDGPU_MMHUB0(adev->jpeg.inst[i].aid_id); in jpeg_v4_0_3_sw_init()
125 ring->doorbell_index = in jpeg_v4_0_3_sw_init()
130 ring->doorbell_index = in jpeg_v4_0_3_sw_init()
134 ring->doorbell_index = in jpeg_v4_0_3_sw_init()
138 snprintf(ring->name, sizeof(ring->name), "jpeg_dec_%d.%d", adev->jpeg.inst[i].aid_id, j); in jpeg_v4_0_3_sw_init()
139 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, 0, in jpeg_v4_0_3_sw_init()
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| D | uvd_v6_0.c | 77 static uint64_t uvd_v6_0_ring_get_rptr(struct amdgpu_ring *ring) in uvd_v6_0_ring_get_rptr() argument
79 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_ring_get_rptr()
91 static uint64_t uvd_v6_0_enc_ring_get_rptr(struct amdgpu_ring *ring) in uvd_v6_0_enc_ring_get_rptr() argument
93 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_enc_ring_get_rptr()
95 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_rptr()
107 static uint64_t uvd_v6_0_ring_get_wptr(struct amdgpu_ring *ring) in uvd_v6_0_ring_get_wptr() argument
109 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_ring_get_wptr()
121 static uint64_t uvd_v6_0_enc_ring_get_wptr(struct amdgpu_ring *ring) in uvd_v6_0_enc_ring_get_wptr() argument
123 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_enc_ring_get_wptr()
125 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_wptr()
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| D | sdma_v7_0.c | 142 static unsigned sdma_v7_0_ring_init_cond_exec(struct amdgpu_ring *ring, in sdma_v7_0_ring_init_cond_exec() argument
147 amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COND_EXE)); in sdma_v7_0_ring_init_cond_exec()
148 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v7_0_ring_init_cond_exec()
149 amdgpu_ring_write(ring, upper_32_bits(addr)); in sdma_v7_0_ring_init_cond_exec()
150 amdgpu_ring_write(ring, 1); in sdma_v7_0_ring_init_cond_exec()
152 ret = ring->wptr & ring->buf_mask; in sdma_v7_0_ring_init_cond_exec()
154 amdgpu_ring_write(ring, 0); in sdma_v7_0_ring_init_cond_exec()
166 static uint64_t sdma_v7_0_ring_get_rptr(struct amdgpu_ring *ring) in sdma_v7_0_ring_get_rptr() argument
171 rptr = (u64 *)ring->rptr_cpu_addr; in sdma_v7_0_ring_get_rptr()
184 static uint64_t sdma_v7_0_ring_get_wptr(struct amdgpu_ring *ring) in sdma_v7_0_ring_get_wptr() argument
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| D | sdma_v6_0.c | 141 static unsigned sdma_v6_0_ring_init_cond_exec(struct amdgpu_ring *ring, in sdma_v6_0_ring_init_cond_exec() argument
146 amdgpu_ring_write(ring, SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COND_EXE)); in sdma_v6_0_ring_init_cond_exec()
147 amdgpu_ring_write(ring, lower_32_bits(addr)); in sdma_v6_0_ring_init_cond_exec()
148 amdgpu_ring_write(ring, upper_32_bits(addr)); in sdma_v6_0_ring_init_cond_exec()
149 amdgpu_ring_write(ring, 1); in sdma_v6_0_ring_init_cond_exec()
151 ret = ring->wptr & ring->buf_mask; in sdma_v6_0_ring_init_cond_exec()
153 amdgpu_ring_write(ring, 0); in sdma_v6_0_ring_init_cond_exec()
165 static uint64_t sdma_v6_0_ring_get_rptr(struct amdgpu_ring *ring) in sdma_v6_0_ring_get_rptr() argument
170 rptr = (u64 *)ring->rptr_cpu_addr; in sdma_v6_0_ring_get_rptr()
183 static uint64_t sdma_v6_0_ring_get_wptr(struct amdgpu_ring *ring) in sdma_v6_0_ring_get_wptr() argument
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| /openbsd/src/usr.bin/telnet/ |
| D | ring.c | 77 ring_init(Ring *ring, unsigned char *buffer, int count) in ring_init() argument
79 memset(ring, 0, sizeof *ring); in ring_init()
81 ring->size = count; in ring_init()
83 ring->supply = ring->consume = ring->bottom = buffer; in ring_init()
85 ring->top = ring->bottom+ring->size; in ring_init()
95 ring_mark(Ring *ring) in ring_mark() argument
97 ring->mark = ring_decrement(ring, ring->supply, 1); in ring_mark()
105 ring_at_mark(Ring *ring) in ring_at_mark() argument
107 if (ring->mark == ring->consume) { in ring_at_mark()
119 ring_clear_mark(Ring *ring) in ring_clear_mark() argument
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| /openbsd/src/sys/dev/pci/drm/radeon/ |
| D | radeon_ring.c | 50 static void radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
63 struct radeon_ring *ring) in radeon_ring_supports_scratch_reg() argument
65 switch (ring->idx) { in radeon_ring_supports_scratch_reg()
83 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring) in radeon_ring_free_size() argument
85 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); in radeon_ring_free_size()
88 ring->ring_free_dw = rptr + (ring->ring_size / 4); in radeon_ring_free_size()
89 ring->ring_free_dw -= ring->wptr; in radeon_ring_free_size()
90 ring->ring_free_dw &= ring->ptr_mask; in radeon_ring_free_size()
91 if (!ring->ring_free_dw) { in radeon_ring_free_size()
93 ring->ring_free_dw = ring->ring_size / 4; in radeon_ring_free_size()
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| D | radeon_fence.c | 67 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) in radeon_fence_write() argument
69 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_write()
88 static u32 radeon_fence_read(struct radeon_device *rdev, int ring) in radeon_fence_read() argument
90 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_read()
112 static void radeon_fence_schedule_check(struct radeon_device *rdev, int ring) in radeon_fence_schedule_check() argument
119 &rdev->fence_drv[ring].lockup_work, in radeon_fence_schedule_check()
135 int ring) in radeon_fence_emit() argument
145 (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_emit()
146 (*fence)->ring = ring; in radeon_fence_emit()
150 rdev->fence_context + ring, in radeon_fence_emit()
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| D | evergreen_dma.c | 43 struct radeon_ring *ring = &rdev->ring[fence->ring]; in evergreen_dma_fence_ring_emit() local
44 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in evergreen_dma_fence_ring_emit()
46 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_FENCE, 0, 0)); in evergreen_dma_fence_ring_emit()
47 radeon_ring_write(ring, addr & 0xfffffffc); in evergreen_dma_fence_ring_emit()
48 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); in evergreen_dma_fence_ring_emit()
49 radeon_ring_write(ring, fence->seq); in evergreen_dma_fence_ring_emit()
51 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_TRAP, 0, 0)); in evergreen_dma_fence_ring_emit()
53 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0)); in evergreen_dma_fence_ring_emit()
54 radeon_ring_write(ring, (0xf << 16) | (HDP_MEM_COHERENCY_FLUSH_CNTL >> 2)); in evergreen_dma_fence_ring_emit()
55 radeon_ring_write(ring, 1); in evergreen_dma_fence_ring_emit()
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| D | r600_dma.c | 51 struct radeon_ring *ring) in r600_dma_get_rptr() argument
56 rptr = rdev->wb.wb[ring->rptr_offs/4]; in r600_dma_get_rptr()
72 struct radeon_ring *ring) in r600_dma_get_wptr() argument
86 struct radeon_ring *ring) in r600_dma_set_wptr() argument
88 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); in r600_dma_set_wptr()
108 rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false; in r600_dma_stop()
121 struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; in r600_dma_resume() local
130 rb_bufsz = order_base_2(ring->ring_size / 4); in r600_dma_resume()
150 WREG32(DMA_RB_BASE, ring->gpu_addr >> 8); in r600_dma_resume()
166 ring->wptr = 0; in r600_dma_resume()
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| D | cik_sdma.c | 63 struct radeon_ring *ring) in cik_sdma_get_rptr() argument
68 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cik_sdma_get_rptr()
70 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_rptr()
90 struct radeon_ring *ring) in cik_sdma_get_wptr() argument
94 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_wptr()
111 struct radeon_ring *ring) in cik_sdma_set_wptr() argument
115 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_set_wptr()
120 WREG32(reg, (ring->wptr << 2) & 0x3fffc); in cik_sdma_set_wptr()
135 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cik_sdma_ring_ib_execute() local
136 u32 extra_bits = (ib->vm ? ib->vm->ids[ib->ring].id : 0) & 0xf; in cik_sdma_ring_ib_execute()
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| D | uvd_v1_0.c | 40 struct radeon_ring *ring) in uvd_v1_0_get_rptr() argument
54 struct radeon_ring *ring) in uvd_v1_0_get_wptr() argument
68 struct radeon_ring *ring) in uvd_v1_0_set_wptr() argument
70 WREG32(UVD_RBC_RB_WPTR, ring->wptr); in uvd_v1_0_set_wptr()
84 struct radeon_ring *ring = &rdev->ring[fence->ring]; in uvd_v1_0_fence_emit() local
85 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v1_0_fence_emit()
87 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA0, 0)); in uvd_v1_0_fence_emit()
88 radeon_ring_write(ring, addr & 0xffffffff); in uvd_v1_0_fence_emit()
89 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA1, 0)); in uvd_v1_0_fence_emit()
90 radeon_ring_write(ring, fence->seq); in uvd_v1_0_fence_emit()
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| D | ni_dma.c | 53 struct radeon_ring *ring) in cayman_dma_get_rptr() argument
58 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cayman_dma_get_rptr()
60 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cayman_dma_get_rptr()
80 struct radeon_ring *ring) in cayman_dma_get_wptr() argument
84 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cayman_dma_get_wptr()
101 struct radeon_ring *ring) in cayman_dma_set_wptr() argument
105 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cayman_dma_set_wptr()
110 WREG32(reg, (ring->wptr << 2) & 0x3fffc); in cayman_dma_set_wptr()
124 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cayman_dma_ring_ib_execute() local
125 unsigned vm_id = ib->vm ? ib->vm->ids[ib->ring].id : 0; in cayman_dma_ring_ib_execute()
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| D | radeon_trace.h | 34 __field(u32, ring)
40 __entry->ring = p->ring;
43 p->rdev, p->ring);
46 __entry->ring, __entry->dw,
51 TP_PROTO(unsigned vmid, int ring),
52 TP_ARGS(vmid, ring),
55 __field(u32, ring)
60 __entry->ring = ring;
62 TP_printk("vmid=%u, ring=%u", __entry->vmid, __entry->ring)
108 TP_PROTO(uint64_t pd_addr, unsigned ring, unsigned id),
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| /openbsd/src/sys/dev/pci/drm/i915/gt/ |
| D | intel_ring.c | 19 unsigned int intel_ring_update_space(struct intel_ring *ring) in intel_ring_update_space() argument
23 space = __intel_ring_space(ring->head, ring->emit, ring->size); in intel_ring_update_space()
25 ring->space = space; in intel_ring_update_space()
29 void __intel_ring_pin(struct intel_ring *ring) in __intel_ring_pin() argument
31 GEM_BUG_ON(!atomic_read(&ring->pin_count)); in __intel_ring_pin()
32 atomic_inc(&ring->pin_count); in __intel_ring_pin()
35 int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww) in intel_ring_pin() argument
37 struct i915_vma *vma = ring->vma; in intel_ring_pin()
42 if (atomic_fetch_inc(&ring->pin_count)) in intel_ring_pin()
73 intel_ring_reset(ring, ring->emit); in intel_ring_pin()
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| D | intel_ring.h | 21 unsigned int intel_ring_update_space(struct intel_ring *ring);
23 void __intel_ring_pin(struct intel_ring *ring);
24 int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww);
25 void intel_ring_unpin(struct intel_ring *ring);
26 void intel_ring_reset(struct intel_ring *ring, u32 tail);
30 static inline struct intel_ring *intel_ring_get(struct intel_ring *ring) in intel_ring_get() argument
32 kref_get(&ring->ref); in intel_ring_get()
33 return ring; in intel_ring_get()
36 static inline void intel_ring_put(struct intel_ring *ring) in intel_ring_put() argument
38 kref_put(&ring->ref, intel_ring_free); in intel_ring_put()
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