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Searched refs:regSDMA0_QUEUE4_IB_SUB_REMAIN (Results 1 – 4 of 4) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h585 #define regSDMA0_QUEUE4_IB_SUB_REMAIN … macro
Dgc_12_0_0_offset.h600 #define regSDMA0_QUEUE4_IB_SUB_REMAIN … macro
Dgc_11_0_3_offset.h586 #define regSDMA0_QUEUE4_IB_SUB_REMAIN … macro
Dgc_11_0_0_offset.h580 #define regSDMA0_QUEUE4_IB_SUB_REMAIN … macro