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Searched refs:regSDMA0_QUEUE2_IB_SUB_REMAIN (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Dsdma_v7_0.c110 SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_SUB_REMAIN),
Dsdma_v6_0.c110 SOC15_REG_ENTRY_STR(GC, 0, regSDMA0_QUEUE2_IB_SUB_REMAIN),
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h413 #define regSDMA0_QUEUE2_IB_SUB_REMAIN … macro
Dgc_12_0_0_offset.h412 #define regSDMA0_QUEUE2_IB_SUB_REMAIN … macro
Dgc_11_0_3_offset.h414 #define regSDMA0_QUEUE2_IB_SUB_REMAIN … macro
Dgc_11_0_0_offset.h408 #define regSDMA0_QUEUE2_IB_SUB_REMAIN … macro