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Searched refs:regSDMA0_QUEUE0_MIDCMD_CNTL (Results 1 – 5 of 5) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v11.c440 reg <= regSDMA0_QUEUE0_MIDCMD_CNTL; reg++) in hqd_sdma_dump_v11()
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h279 #define regSDMA0_QUEUE0_MIDCMD_CNTL … macro
Dgc_12_0_0_offset.h240 #define regSDMA0_QUEUE0_MIDCMD_CNTL … macro
Dgc_11_0_3_offset.h280 #define regSDMA0_QUEUE0_MIDCMD_CNTL … macro
Dgc_11_0_0_offset.h274 #define regSDMA0_QUEUE0_MIDCMD_CNTL … macro