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Searched refs:regPA_SC_ENHANCE_3 (Results 1 – 5 of 5) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h5035 #define regPA_SC_ENHANCE_3 … macro
Dgc_12_0_0_offset.h9187 #define regPA_SC_ENHANCE_3 … macro
Dgc_11_0_3_offset.h6500 #define regPA_SC_ENHANCE_3 … macro
Dgc_11_0_0_offset.h6220 #define regPA_SC_ENHANCE_3 … macro
/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Dgfx_v11_0.c256 SOC15_REG_GOLDEN_VALUE(GC, 0, regPA_SC_ENHANCE_3, 0xfffffffd, 0x00000008),