Home
last modified time | relevance | path

Searched refs:regPA_SC_BINNER_DYNAMIC_BATCH_LIMIT_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h5092 #define regPA_SC_BINNER_DYNAMIC_BATCH_LIMIT_BASE_IDX macro
Dgc_12_0_0_offset.h8948 #define regPA_SC_BINNER_DYNAMIC_BATCH_LIMIT_BASE_IDX macro