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Searched refs:regGRBM_SOFT_RESET (Results 1 – 10 of 10) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Dsdma_v7_0.c778 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp); in sdma_v7_0_soft_reset()
779 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v7_0_soft_reset()
783 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0); in sdma_v7_0_soft_reset()
784 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v7_0_soft_reset()
Dsdma_v6_0.c758 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, tmp); in sdma_v6_0_soft_reset()
759 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v6_0_soft_reset()
763 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, 0); in sdma_v6_0_soft_reset()
764 tmp = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in sdma_v6_0_soft_reset()
Dgfx_v9_4_3.c2470 tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET); in gfx_v9_4_3_soft_reset()
2473 WREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET, tmp); in gfx_v9_4_3_soft_reset()
2474 tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET); in gfx_v9_4_3_soft_reset()
2479 WREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET, tmp); in gfx_v9_4_3_soft_reset()
2480 tmp = RREG32_SOC15(GC, GET_INST(GC, 0), regGRBM_SOFT_RESET); in gfx_v9_4_3_soft_reset()
Dgfx_v11_0.c4853 grbm_soft_reset = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in gfx_v11_0_soft_reset()
4864 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, grbm_soft_reset); in gfx_v11_0_soft_reset()
4866 grbm_soft_reset = RREG32_SOC15(GC, 0, regGRBM_SOFT_RESET); in gfx_v11_0_soft_reset()
4877 WREG32_SOC15(GC, 0, regGRBM_SOFT_RESET, grbm_soft_reset); in gfx_v11_0_soft_reset()
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_4_3_offset.h44 #define regGRBM_SOFT_RESET … macro
Dgc_9_4_2_offset.h3324 #define regGRBM_SOFT_RESET … macro
Dgc_11_5_0_offset.h967 #define regGRBM_SOFT_RESET … macro
Dgc_12_0_0_offset.h2010 #define regGRBM_SOFT_RESET … macro
Dgc_11_0_3_offset.h1918 #define regGRBM_SOFT_RESET … macro
Dgc_11_0_0_offset.h1854 #define regGRBM_SOFT_RESET … macro