Home
last modified time | relevance | path

Searched refs:regCP_VMID_RESET (Results 1 – 8 of 8) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Dgfx_v11_0.c4825 WREG32_SOC15(GC, 0, regCP_VMID_RESET, 0xfffffffe); in gfx_v11_0_soft_reset()
4829 RREG32_SOC15(GC, 0, regCP_VMID_RESET); in gfx_v11_0_soft_reset()
4830 RREG32_SOC15(GC, 0, regCP_VMID_RESET); in gfx_v11_0_soft_reset()
4831 RREG32_SOC15(GC, 0, regCP_VMID_RESET); in gfx_v11_0_soft_reset()
4887 if (!RREG32_SOC15(GC, 0, regCP_VMID_RESET)) in gfx_v11_0_soft_reset()
Dmes_v11_0.c388 WREG32_SOC15(GC, 0, regCP_VMID_RESET, value); in mes_v11_0_reset_queue_mmio()
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_4_3_offset.h3030 #define regCP_VMID_RESET macro
Dgc_9_4_2_offset.h569 #define regCP_VMID_RESET macro
Dgc_11_5_0_offset.h3289 #define regCP_VMID_RESET macro
Dgc_12_0_0_offset.h3600 #define regCP_VMID_RESET macro
Dgc_11_0_3_offset.h4540 #define regCP_VMID_RESET macro
Dgc_11_0_0_offset.h4316 #define regCP_VMID_RESET macro