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Searched refs:regCP_HQD_EOP_RPTR (Results 1 – 11 of 11) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Damdgpu_amdkfd_gc_9_4_3.c351 WREG32_SOC15_RLC(GC, GET_INST(GC, inst), regCP_HQD_EOP_RPTR, in kgd_gfx_v9_4_3_hqd_load()
Damdgpu_amdkfd_gfx_v11.c249 WREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_EOP_RPTR), in hqd_load_v11()
Dgfx_v9_4_3.c143 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),
Dgfx_v12_0.c155 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),
Dgfx_v11_0.c195 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_RPTR),
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_4_3_offset.h3366 #define regCP_HQD_EOP_RPTR macro
Dgc_9_4_2_offset.h777 #define regCP_HQD_EOP_RPTR macro
Dgc_11_5_0_offset.h3657 #define regCP_HQD_EOP_RPTR macro
Dgc_12_0_0_offset.h3924 #define regCP_HQD_EOP_RPTR macro
Dgc_11_0_3_offset.h4908 #define regCP_HQD_EOP_RPTR macro
Dgc_11_0_0_offset.h4684 #define regCP_HQD_EOP_RPTR macro