Searched refs:regCP_HQD_EOP_BASE_ADDR (Results 1 – 9 of 9) sorted by relevance
| /openbsd/src/sys/dev/pci/drm/amd/amdgpu/ |
| D | gfx_v9_4_3.c | 140 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_BASE_ADDR),
1941 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_EOP_BASE_ADDR, in gfx_v9_4_3_xcc_kiq_init_register()
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| D | gfx_v12_0.c | 152 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_BASE_ADDR),
3133 WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR, in gfx_v12_0_kiq_init_register()
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| D | gfx_v11_0.c | 192 SOC15_REG_ENTRY_STR(GC, 0, regCP_HQD_EOP_BASE_ADDR),
4189 WREG32_SOC15(GC, 0, regCP_HQD_EOP_BASE_ADDR, in gfx_v11_0_kiq_init_register()
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| /openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/ |
| D | gc_9_4_3_offset.h | 3360 #define regCP_HQD_EOP_BASE_ADDR … macro
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| D | gc_9_4_2_offset.h | 771 #define regCP_HQD_EOP_BASE_ADDR … macro
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| D | gc_11_5_0_offset.h | 3651 #define regCP_HQD_EOP_BASE_ADDR … macro
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| D | gc_12_0_0_offset.h | 3918 #define regCP_HQD_EOP_BASE_ADDR … macro
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| D | gc_11_0_3_offset.h | 4902 #define regCP_HQD_EOP_BASE_ADDR … macro
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| D | gc_11_0_0_offset.h | 4678 #define regCP_HQD_EOP_BASE_ADDR … macro
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