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Searched refs:regCP_GFX_HQD_CNTL (Results 1 – 6 of 6) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Dgfx_v12_0.c185 SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_CNTL),
2894 tmp = RREG32_SOC15(GC, 0, regCP_GFX_HQD_CNTL); in gfx_v12_0_gfx_mqd_init()
Dgfx_v11_0.c225 SOC15_REG_ENTRY_STR(GC, 0, regCP_GFX_HQD_CNTL),
3958 tmp = RREG32_SOC15(GC, 0, regCP_GFX_HQD_CNTL); in gfx_v11_0_gfx_mqd_init()
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_11_5_0_offset.h3403 #define regCP_GFX_HQD_CNTL macro
Dgc_12_0_0_offset.h3710 #define regCP_GFX_HQD_CNTL macro
Dgc_11_0_3_offset.h4654 #define regCP_GFX_HQD_CNTL macro
Dgc_11_0_0_offset.h4430 #define regCP_GFX_HQD_CNTL macro