Searched refs:psr_settings (Results 1 – 16 of 16) sorted by relevance
68 link->psr_settings.psr_feature_enabled = false; in amdgpu_dm_set_psr_caps()73 link->psr_settings.psr_feature_enabled = false; in amdgpu_dm_set_psr_caps()78 link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED; in amdgpu_dm_set_psr_caps()79 link->psr_settings.psr_feature_enabled = false; in amdgpu_dm_set_psr_caps()83 link->psr_settings.psr_version = DC_PSR_VERSION_SU_1; in amdgpu_dm_set_psr_caps()85 link->psr_settings.psr_version = DC_PSR_VERSION_1; in amdgpu_dm_set_psr_caps()87 link->psr_settings.psr_feature_enabled = true; in amdgpu_dm_set_psr_caps()91 link->psr_settings.psr_feature_enabled, in amdgpu_dm_set_psr_caps()92 link->psr_settings.psr_version, in amdgpu_dm_set_psr_caps()119 if (link->psr_settings.psr_version != DC_PSR_VERSION_UNSUPPORTED) { in amdgpu_dm_link_setup_psr()[all …]
132 link->psr_settings.psr_allow_active); in amdgpu_dm_crtc_set_panel_sr_feature()144 if (link->psr_settings.psr_version < DC_PSR_VERSION_SU_1 && is_sr_active) in amdgpu_dm_crtc_set_panel_sr_feature()146 } else if (link->psr_settings.psr_feature_enabled && in amdgpu_dm_crtc_set_panel_sr_feature()
229 if (stream_state->link->psr_settings.psr_version < DC_PSR_VERSION_SU_1) in amdgpu_dm_crtc_configure_crc_source()
5037 link->psr_settings.psr_feature_enabled = false; in amdgpu_dm_initialize_drm_device()5038 link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED; in amdgpu_dm_initialize_drm_device()8420 acrtc_state->stream->link->psr_settings.psr_version < in manage_dm_interrupts()8905 struct psr_settings *psr = &acrtc_state->stream->link->psr_settings; in amdgpu_dm_enable_self_refresh()9090 if (acrtc_state->stream->link->psr_settings.psr_feature_enabled || in amdgpu_dm_commit_planes()9095 acrtc_state->stream->link->psr_settings.psr_version == in amdgpu_dm_commit_planes()9105 if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 && in amdgpu_dm_commit_planes()9112 acrtc_state->stream->link->psr_settings.psr_dirty_rects_change_timestamp_ns = in amdgpu_dm_commit_planes()9114 if (acrtc_state->stream->link->psr_settings.psr_allow_active) in amdgpu_dm_commit_planes()9284 if (acrtc_state->stream->link->psr_settings.psr_allow_active) in amdgpu_dm_commit_planes()
1050 seq_printf(m, "Driver support: %s", str_yes_no(link->psr_settings.psr_feature_enabled)); in psr_capability_show()1051 if (link->psr_settings.psr_version) in psr_capability_show()1052 seq_printf(m, " [0x%02x]", link->psr_settings.psr_version); in psr_capability_show()
66 if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1 || in should_use_dmub_lock()67 link->psr_settings.psr_version == DC_PSR_VERSION_1) in should_use_dmub_lock()
145 if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_UNSUPPORTED) in dmub_psr_set_version()151 switch (stream->link->psr_settings.psr_version) { in dmub_psr_set_version()392 link->psr_settings.force_ffu_mode = 1; in dmub_psr_copy_settings()394 link->psr_settings.force_ffu_mode = 0; in dmub_psr_copy_settings()395 copy_settings_data->force_ffu_mode = link->psr_settings.force_ffu_mode; in dmub_psr_copy_settings()411 if (link->psr_settings.psr_version == DC_PSR_VERSION_1 && in dmub_psr_copy_settings()
112 if (!edp_link->psr_settings.psr_feature_enabled) in clk_mgr_exit_optimized_pwr_state()114 clk_mgr->psr_allow_active_cache = edp_link->psr_settings.psr_allow_active; in clk_mgr_exit_optimized_pwr_state()133 if (!edp_link->psr_settings.psr_feature_enabled) in clk_mgr_optimize_pwr_state()
150 if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) in mod_build_vsc_infopacket()154 else if (stream->link->psr_settings.psr_version == DC_PSR_VERSION_1) in mod_build_vsc_infopacket()
914 link->psr_settings.psr_frame_capture_indication_req = true; in mod_power_calc_psr_configs()915 link->psr_settings.psr_sdp_transmit_line_num_deadline = num_vblank_lines; in mod_power_calc_psr_configs()920 link->psr_settings.psr_frame_capture_indication_req = false; in mod_power_calc_psr_configs()921 link->psr_settings.psr_sdp_transmit_line_num_deadline = sdp_tx_deadline_in_us / line_time_in_us; in mod_power_calc_psr_configs()924 …psr_config->psr_sdp_transmit_line_num_deadline = link->psr_settings.psr_sdp_transmit_line_num_dead… in mod_power_calc_psr_configs()928 psr_config->psr_frame_capture_indication_req = link->psr_settings.psr_frame_capture_indication_req; in mod_power_calc_psr_configs()
97 if (pipe_ctx->stream->link->psr_settings.psr_feature_enabled) in dce60_should_enable_fbc()
1750 struct psr_settings psr_settings; member
996 struct psr_settings { struct
1048 if ((pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1 || in dc_dmub_should_update_cursor_data()1049 pipe_ctx->stream->link->psr_settings.psr_version == DC_PSR_VERSION_1) && in dc_dmub_should_update_cursor_data()
3417 if ((stream->link->psr_settings.psr_version == DC_PSR_VERSION_SU_1 in dc_dmub_should_send_dirty_rect_cmd()3418 || stream->link->psr_settings.psr_version == DC_PSR_VERSION_1) in dc_dmub_should_send_dirty_rect_cmd()5284 if (link->psr_settings.psr_feature_enabled) { in dc_set_psr_allow_active()5285 if (enable && !link->psr_settings.psr_allow_active) { in dc_set_psr_allow_active()5289 } else if (!enable && link->psr_settings.psr_allow_active) { in dc_set_psr_allow_active()5866 if (link->psr_settings.psr_feature_enabled) in dc_notify_vsync_int_state()
1088 bool is_psr = (link && (link->psr_settings.psr_version == DC_PSR_VERSION_1 || in decide_zstate_support()1089 … link->psr_settings.psr_version == DC_PSR_VERSION_SU_1) && !link->panel_config.psr.disable_psr); in decide_zstate_support()