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Searched refs:outb (Results 1 – 25 of 49) sorted by relevance

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/openbsd/src/sys/arch/amd64/amd64/
Di8259.c111 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ in i8259_default_setup()
113 outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */ in i8259_default_setup()
114 outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */ in i8259_default_setup()
116 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ in i8259_default_setup()
118 outb(IO_ICU1+1, 1); /* 8086 mode */ in i8259_default_setup()
120 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ in i8259_default_setup()
121 outb(IO_ICU1, 0x68); /* special mask mode (if available) */ in i8259_default_setup()
122 outb(IO_ICU1, 0x0a); /* Read IRR by default. */ in i8259_default_setup()
124 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ in i8259_default_setup()
127 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ in i8259_default_setup()
[all …]
/openbsd/src/sys/dev/isa/
Dif_el.c123 outb(iobase+EL_AC, EL_AC_RESET); in elprobe()
125 outb(iobase+EL_AC, 0); in elprobe()
130 outb(iobase+EL_GPBL, i); in elprobe()
215 outb(sc->sc_iobase+EL_AC, 0); in elstop()
228 outb(iobase+EL_AC, EL_AC_RESET); in el_hardreset()
230 outb(iobase+EL_AC, 0); in el_hardreset()
233 outb(iobase+i, sc->sc_arpcom.ac_enaddr[i]); in el_hardreset()
251 outb(iobase+EL_RXC, EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB | EL_RXC_DOFLOW | EL_RXC_PROMISC); in elinit()
253 outb(iobase+EL_RXC, EL_RXC_AGF | EL_RXC_DSHORT | EL_RXC_DDRIB | EL_RXC_DOFLOW | EL_RXC_ABROAD); in elinit()
254 outb(iobase+EL_RBC, 0); in elinit()
[all …]
Dif_ie.c465 outb(ELINK_ID_PORT, 0xff); in el_probe()
468 outb(PORT + IE507_CTRL, inb(PORT + IE507_CTRL) & 0xfc); /* XXX */ in el_probe()
481 outb(ELINK_ID_PORT, 0x00); in el_probe()
483 outb(ELINK_ID_PORT, 0x00); in el_probe()
486 outb(PORT + IE507_CTRL, EL_CTRL_NRST | EL_CTRL_BNK2); in el_probe()
514 outb(PORT + IE507_CTRL, EL_CTRL_NORMAL); in el_probe()
524 outb(PORT + IE507_CTRL, EL_CTRL_NRST); in el_probe()
533 outb(PORT + IE507_CTRL, EL_CTRL_NRST); in el_probe()
540 outb(PORT + IE507_ICTRL, 1); in el_probe()
568 outb(ia->ia_iobase + IEE16_ECTRL, IEE16_RESET_ASIC); in ee16_probe()
[all …]
Dpas.c141 #define paswrite(d, p) outb(p, d)
259 outb(MASTER_DECODE, 0xbc); in pasprobe()
274 outb(MASTER_DECODE, iobase >> 2); in pasprobe()
/openbsd/src/sys/arch/i386/include/
Di8259.h50 #define SET_ICUS() (outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8))
89 outb %al,$IO_ICU1
93 outb %al,$ICUADDR
100 outb %al,$IO_ICU1
108 outb %al,$IO_ICU2 /* do the second ICU first */ ;\
110 outb %al,$IO_ICU1
124 outb %al,$(ICUADDR+1)
133 outb %al,$(ICUADDR+1) ;\
/openbsd/src/gnu/usr.bin/binutils/gdb/
Dser-go32.c242 #define outb(p,a,v) outportb((p)->base + (a), (v)) macro
492 outb (port, com_cfcr, 0); in dos_open()
493 outb (port, com_iir, 0); in dos_open()
505 outb (port, com_ier, 0); in dos_open()
508 outb (port, com_fifo, in dos_open()
518 outb (port, com_mcr, MCR_IENABLE); in dos_open()
524 outb (port, com_mcr, 0); in dos_open()
525 outb (port, com_fifo, 0); in dos_open()
543 outb (port, com_cfcr, CFCR_DLAB); in dos_open()
544 outb (port, com_dlbl, i & 0xff); in dos_open()
[all …]
/openbsd/src/sys/arch/amd64/stand/libsa/
Dbioscons.c59 outb(IO_RTC, NVRAM_EQUIPMENT); in pc_probe()
147 outb(port + com_ier, 0); in com_init()
150 outb(port + com_mcr, MCR_DTR | MCR_RTS); in com_init()
151 outb(port + com_ier, 0); in com_init()
152 outb(port + com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | in com_init()
222 outb(port + com_cfcr, LCR_DLAB); in comspeed()
223 outb(port + com_dlbl, newsp); in comspeed()
224 outb(port + com_dlbh, newsp>>8); in comspeed()
225 outb(port + com_cfcr, LCR_8BITS); in comspeed()
242 outb(port + com_data, c); in com_putc()
DgateA20.c69 outb(0x92, data | 0x2); in gateA20()
72 outb(0x92, data & ~0x2); in gateA20()
81 outb(IO_KBD + KBCMDP, KBC_CMDWOUT); in gateA20()
85 outb(IO_KBD + KBDATAP, KB_A20); in gateA20()
87 outb(IO_KBD + KBDATAP, 0xcd); in gateA20()
/openbsd/src/sys/arch/amd64/include/
Di8259.h89 outb %al,$IO_ICU1
93 outb %al,$ICUADDR
100 outb %al,$IO_ICU1
108 outb %al,$IO_ICU2 /* do the second ICU first */ ;\
110 outb %al,$IO_ICU1
128 outb %al,$(ICUADDR+1)
134 outb %al,$(ICUADDR+1)
/openbsd/src/sys/arch/i386/stand/libsa/
Dbioscons.c57 outb(IO_RTC, NVRAM_EQUIPMENT); in pc_probe()
145 outb(port + com_ier, 0); in com_init()
148 outb(port + com_mcr, MCR_DTR | MCR_RTS); in com_init()
149 outb(port + com_fifo, FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | in com_init()
219 outb(port + com_cfcr, LCR_DLAB); in comspeed()
220 outb(port + com_dlbl, newsp); in comspeed()
221 outb(port + com_dlbh, newsp>>8); in comspeed()
222 outb(port + com_cfcr, LCR_8BITS); in comspeed()
239 outb(port + com_data, c); in com_putc()
DgateA20.c67 outb(0x92, data | 0x2); in gateA20()
70 outb(0x92, data & ~0x2); in gateA20()
79 outb(IO_KBD + KBCMDP, KBC_CMDWOUT); in gateA20()
83 outb(IO_KBD + KBDATAP, KB_A20); in gateA20()
85 outb(IO_KBD + KBDATAP, 0xcd); in gateA20()
/openbsd/src/sys/dev/pci/drm/i915/display/
Dintel_vga.c40 outb(0x01, VGA_SEQ_I); in intel_vga_disable()
42 outb(sr1 | VGA_SR01_SCREEN_OFF, VGA_SEQ_D); in intel_vga_disable()
44 outb(VGA_SEQ_I, 0x01); in intel_vga_disable()
46 outb(VGA_SEQ_D, sr1 | VGA_SR01_SCREEN_OFF); in intel_vga_disable()
104 outb(inb(VGA_MIS_R), VGA_MIS_W); in intel_vga_reset_io_mem()
106 outb(VGA_MIS_W, inb(VGA_MIS_R)); in intel_vga_reset_io_mem()
/openbsd/src/sys/arch/i386/isa/
Disa_machdep.c174 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ in isa_defaultirq()
175 outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */ in isa_defaultirq()
176 outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */ in isa_defaultirq()
178 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ in isa_defaultirq()
180 outb(IO_ICU1+1, 1); /* 8086 mode */ in isa_defaultirq()
182 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ in isa_defaultirq()
183 outb(IO_ICU1, 0x68); /* special mask mode (if available) */ in isa_defaultirq()
184 outb(IO_ICU1, 0x0a); /* Read IRR by default. */ in isa_defaultirq()
186 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ in isa_defaultirq()
189 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ in isa_defaultirq()
[all …]
Dclock.c148 outb(IO_RTC, reg); in mc146818_read()
162 outb(IO_RTC, reg); in mc146818_write()
164 outb(IO_RTC+1, datum); in mc146818_write()
294 outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); in gettick()
703 outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); in i8254_startclock()
704 outb(IO_TIMER1 + TIMER_CNTR0, tval & 0xff); in i8254_startclock()
705 outb(IO_TIMER1 + TIMER_CNTR0, tval >> 8); in i8254_startclock()
723 outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); in i8254_get_timecount()
Djoy_isa.c66 outb(iobase, 0xff); in joy_isa_probe()
85 outb(iobase, 0xff); in joy_isa_attach()
Djoy.c101 outb(port, 0xff); in joyread()
169 outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0); in joy_get_tick()
Djoy_isapnp.c67 outb(iobase, 0xff); in joy_isapnp_attach()
/openbsd/src/sys/arch/amd64/isa/
Dclock.c144 outb(IO_RTC, reg); in mc146818_read()
152 outb(IO_RTC, reg); in mc146818_write()
154 outb(IO_RTC+1, datum); in mc146818_write()
216 outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); in gettick()
557 outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); in i8254_startclock()
558 outb(IO_TIMER1 + TIMER_CNTR0, tval & 0xff); in i8254_startclock()
559 outb(IO_TIMER1 + TIMER_CNTR0, tval >> 8); in i8254_startclock()
577 outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); in i8254_get_timecount()
/openbsd/src/regress/usr.sbin/relayd/
Dfuncs.pl77 my $outb = 0;
87 $outb += write_syswrite($self, $data);
88 my $pct = ($outb / $len) * 100.0;
90 printf(STDERR "%.2f%% $outb/$len\n", $pct);
97 $outb += write_syswrite($self, 'r');
98 my $pct = ($outb / $len) * 100.0;
100 printf(STDERR "%.2f%% $outb/$len\n", $pct);
105 $outb += write_syswrite($self, "\n\n");
107 print STDERR "LEN: ", $outb, "\n";
/openbsd/src/sys/arch/i386/pci/
Dpci_machdep.c465 outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable); in pci_conf_read()
466 outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward); in pci_conf_read()
468 outb(PCI_MODE2_ENABLE_REG, 0); in pci_conf_read()
503 outb(PCI_MODE2_ENABLE_REG, tag.mode2.enable); in pci_conf_write()
504 outb(PCI_MODE2_FORWARD_REG, tag.mode2.forward); in pci_conf_write()
506 outb(PCI_MODE2_ENABLE_REG, 0); in pci_conf_write()
586 outb(PCI_MODE1_ADDRESS_REG + 3, 0); in pci_mode_detect()
611 outb(PCI_MODE2_ENABLE_REG, 0); in pci_mode_detect()
612 outb(PCI_MODE2_FORWARD_REG, 0); in pci_mode_detect()
/openbsd/src/sys/arch/powerpc/include/
Dpio.h135 #define outb(a,v) (__outb((volatile u_int8_t *)(a), v)) macro
136 #define out8(a,v) outb(a,v)
148 #define out8rb(a,v) outb(a,v)
/openbsd/src/lib/libarch/alpha/
Dio.c82 outb(u_int32_t port, u_int8_t val) in outb() function
84 ops->outb(port, val); in outb()
Dio.h35 void (*outb)(u_int32_t, u_int8_t); member
/openbsd/src/sys/arch/i386/i386/
Dcpu.c763 outb(IO_RTC, NVRAM_RESET); in mp_cpu_start()
764 outb(IO_RTC+1, NVRAM_RESET_JUMP); in mp_cpu_start()
811 outb(IO_RTC, NVRAM_RESET); in mp_cpu_start_cleanup()
812 outb(IO_RTC+1, NVRAM_RESET_RST); in mp_cpu_start_cleanup()
/openbsd/src/sys/dev/pci/
Dgdt_pci.c375 outb(0x00,PTR2USHORT(&ha->plx->control1)); in gdt_pci_attach()
376 outb(0xff,PTR2USHORT(&ha->plx->edoor_reg)); in gdt_pci_attach()
384 outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); in gdt_pci_attach()
414 outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); in gdt_pci_attach()

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