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Searched refs:operand0 (Results 1 – 25 of 41) sorted by relevance

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/openbsd/src/gnu/gcc/gcc/config/pa/
Dpa.c1333 register rtx operand0 = operands[0]; in emit_move_sequence() local
1340 if (GET_CODE (operand0) == MEM && IS_INDEX_ADDR_P (XEXP (operand0, 0))) in emit_move_sequence()
1345 tem = copy_to_mode_reg (Pmode, XEXP (operand0, 0)); in emit_move_sequence()
1346 operand0 = replace_equiv_address (operand0, tem); in emit_move_sequence()
1367 && reload_in_progress && GET_CODE (operand0) == REG in emit_move_sequence()
1368 && REGNO (operand0) >= FIRST_PSEUDO_REGISTER) in emit_move_sequence()
1369 operand0 = reg_equiv_mem[REGNO (operand0)]; in emit_move_sequence()
1371 && reload_in_progress && GET_CODE (operand0) == SUBREG in emit_move_sequence()
1372 && GET_CODE (SUBREG_REG (operand0)) == REG in emit_move_sequence()
1373 && REGNO (SUBREG_REG (operand0)) >= FIRST_PSEUDO_REGISTER) in emit_move_sequence()
[all …]
/openbsd/src/gnu/gcc/gcc/config/m68k/
Dm68k.c2351 register rtx operand0 = operands[0]; in emit_move_sequence() local
2356 && reload_in_progress && GET_CODE (operand0) == REG in emit_move_sequence()
2357 && REGNO (operand0) >= FIRST_PSEUDO_REGISTER) in emit_move_sequence()
2358 operand0 = reg_equiv_mem[REGNO (operand0)]; in emit_move_sequence()
2360 && reload_in_progress && GET_CODE (operand0) == SUBREG in emit_move_sequence()
2361 && GET_CODE (SUBREG_REG (operand0)) == REG in emit_move_sequence()
2362 && REGNO (SUBREG_REG (operand0)) >= FIRST_PSEUDO_REGISTER) in emit_move_sequence()
2366 rtx temp = gen_rtx_SUBREG (GET_MODE (operand0), in emit_move_sequence()
2367 reg_equiv_mem [REGNO (SUBREG_REG (operand0))], in emit_move_sequence()
2368 SUBREG_BYTE (operand0)); in emit_move_sequence()
[all …]
/openbsd/src/gnu/usr.bin/gcc/gcc/config/pa/
Dpa.c1356 register rtx operand0 = operands[0]; local
1361 && reload_in_progress && GET_CODE (operand0) == REG
1362 && REGNO (operand0) >= FIRST_PSEUDO_REGISTER)
1363 operand0 = reg_equiv_mem[REGNO (operand0)];
1365 && reload_in_progress && GET_CODE (operand0) == SUBREG
1366 && GET_CODE (SUBREG_REG (operand0)) == REG
1367 && REGNO (SUBREG_REG (operand0)) >= FIRST_PSEUDO_REGISTER)
1371 rtx temp = gen_rtx_SUBREG (GET_MODE (operand0),
1372 reg_equiv_mem [REGNO (SUBREG_REG (operand0))],
1373 SUBREG_BYTE (operand0));
[all …]
/openbsd/src/gnu/usr.bin/gcc/gcc/config/i960/
Di960.md1240 emit_insn (gen_ashrsi3 (operand0, temp, shift_16));
1277 emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
1315 if (GET_CODE (operand0) == SUBREG)
1317 op0_subreg_byte = SUBREG_BYTE (operand0);
1320 operand0 = SUBREG_REG (operand0);
1322 if (GET_MODE (operand0) != SImode)
1323 operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subreg_byte);
1326 emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
1364 emit_insn (gen_lshrsi3 (operand0, temp, shift_16));
1406 emit_insn (gen_lshrsi3 (operand0, temp, shift_24));
[all …]
/openbsd/src/gnu/gcc/gcc/config/m88k/
Dm88k.c314 rtx operand0 = operands[0]; in emit_move_sequence() local
323 if (register_operand (operand0, mode)) in emit_move_sequence()
332 emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); in emit_move_sequence()
336 else if (GET_CODE (operand0) == MEM) in emit_move_sequence()
342 emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); in emit_move_sequence()
347 operands[0] = validize_mem (operand0); in emit_move_sequence()
359 ? operand0 : NULL_RTX); in emit_move_sequence()
/openbsd/src/gnu/usr.bin/gcc/gcc/config/m88k/
Dm88k.c255 register rtx operand0 = operands[0]; local
263 if (register_operand (operand0, mode))
272 emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1));
276 else if (GET_CODE (operand0) == MEM)
282 emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1));
287 operands[0] = validize_mem (operand0);
299 ? operand0 : 0);
/openbsd/src/gnu/usr.bin/gcc/gcc/config/v850/
Dv850.md81 if (!register_operand (operand0, QImode)
105 if (!register_operand (operand0, HImode)
148 if (!register_operand (operand0, SImode)
172 emit_insn (gen_rtx_SET (SImode, operand0,
215 if (!register_operand (operand0, DImode)
237 if (!register_operand (operand0, SFmode)
259 if (!register_operand (operand0, DFmode)
/openbsd/src/gnu/gcc/gcc/config/v850/
Dv850.md90 if (!register_operand (operand0, QImode)
114 if (!register_operand (operand0, HImode)
157 if (!register_operand (operand0, SImode)
181 emit_insn (gen_rtx_SET (SImode, operand0,
224 if (!register_operand (operand0, DImode)
246 if (!register_operand (operand0, SFmode)
268 if (!register_operand (operand0, DFmode)
/openbsd/src/gnu/usr.bin/gcc/gcc/config/mn10300/
Dmn10300.md54 if (!register_operand (operand0, QImode)
145 && !register_operand (operand0, HImode))
274 && !register_operand (operand0, SImode))
338 && !register_operand (operand0, SFmode))
383 && !register_operand (operand0, DImode))
552 && !register_operand (operand0, DFmode))
/openbsd/src/gnu/llvm/llvm/docs/
DAMDGPUInstructionSyntax.rst21 | ``<``\ *opcode mnemonic*\ ``> <``\ *operand0*\ ``>,
/openbsd/src/gnu/usr.bin/gcc/gcc/config/mn10200/
Dmn10200.md68 if (!register_operand (operand0, QImode)
104 && !register_operand (operand0, HImode))
136 && !register_operand (operand0, PSImode))
185 && !register_operand (operand0, SImode))
245 && !register_operand (operand0, SFmode))
/openbsd/src/gnu/gcc/gcc/config/mn10300/
Dmn10300.md66 if (!register_operand (operand0, QImode)
160 && !register_operand (operand0, HImode))
298 && !register_operand (operand0, SImode))
394 && !register_operand (operand0, SFmode))
444 && !register_operand (operand0, DImode))
633 && !register_operand (operand0, DFmode))
/openbsd/src/gnu/gcc/gcc/config/mt/
Dmt.md703 if (!register_operand (operand0, DFmode)
749 requires operand0 and operand2 to be different registers.
815 requires operand0 and operand2 to be different registers.
/openbsd/src/gnu/gcc/gcc/config/sparc/
Dsparc.md3510 emit_insn (gen_lshrsi3 (operand0, temp, shift_16));
3589 emit_insn (gen_lshrdi3 (operand0, temp, shift_48));
3790 emit_insn (gen_ashrsi3 (operand0, temp, shift_16));
3819 if (GET_CODE (operand0) == SUBREG)
3821 op0_subbyte = SUBREG_BYTE (operand0);
3824 operand0 = XEXP (operand0, 0);
3828 if (GET_MODE (operand0) != SImode)
3829 operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subbyte);
3830 emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
3861 emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
[all …]
/openbsd/src/gnu/usr.bin/gcc/gcc/config/sparc/
Dsparc.md4021 emit_insn (gen_lshrsi3 (operand0, temp, shift_16));
4100 emit_insn (gen_lshrdi3 (operand0, temp, shift_48));
4301 emit_insn (gen_ashrsi3 (operand0, temp, shift_16));
4330 if (GET_CODE (operand0) == SUBREG)
4332 op0_subbyte = SUBREG_BYTE (operand0);
4335 operand0 = XEXP (operand0, 0);
4339 if (GET_MODE (operand0) != SImode)
4340 operand0 = gen_rtx_SUBREG (SImode, operand0, op0_subbyte);
4341 emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
4372 emit_insn (gen_ashrsi3 (operand0, temp, shift_24));
[all …]
/openbsd/src/gnu/usr.bin/gcc/gcc/config/dsp16xx/
Ddsp16xx.c1582 register rtx operand0 = operands[0]; local
1587 if (GET_CODE (operand0) == MEM && GET_CODE (operand1) != REG)
/openbsd/src/gnu/gcc/gcc/config/avr/
Davr.md199 if (!register_operand(operand0, QImode)
248 if (!register_operand(operand0, HImode)
296 if (!register_operand (operand0, SImode)
347 && !register_operand (operand0, SFmode))
/openbsd/src/gnu/usr.bin/gcc/gcc/config/avr/
Davr.md182 if (!register_operand(operand0, QImode)
230 if (!register_operand(operand0, HImode)
278 if (!register_operand (operand0, SImode)
329 && !register_operand (operand0, SFmode))
/openbsd/src/gnu/usr.bin/gcc/gcc/config/h8300/
Dh8300.md201 if (!register_operand (operand0, QImode)
312 && !register_operand (operand0, HImode))
349 && !register_operand (operand0, SImode))
371 && !register_operand (operand0, SFmode))
/openbsd/src/gnu/usr.bin/gcc/gcc/config/m68hc11/
Dm68hc11.md2083 operand0,
4761 operand0,
4974 operand0,
5521 operand0,
5840 operand0,
5888 operand0,
/openbsd/src/gnu/gcc/gcc/config/m68hc11/
Dm68hc11.md2091 operand0,
4742 operand0,
4955 operand0,
5500 operand0,
5819 operand0,
5867 operand0,
/openbsd/src/gnu/gcc/gcc/config/h8300/
Dh8300.md238 && !register_operand (operand0, QImode)
319 && !register_operand (operand0, HImode))
354 && !register_operand (operand0, SImode))
790 && !register_operand (operand0, SFmode))
/openbsd/src/gnu/llvm/clang/include/clang/Basic/
Darm_sve.td194 def IsOverloadWhileRW : FlagType<0x00400000>; // Use {pred(default type), typeof(operand0)}…
195 def IsOverloadCvt : FlagType<0x00800000>; // Use {typeof(operand0), typeof(last operand…
/openbsd/src/gnu/gcc/gcc/config/cris/
Dcris.md2196 /* Make intermediate steps if operand0 is not a register or
2203 operand0 and operand1 must have similar predicates.
/openbsd/src/gnu/usr.bin/gcc/gcc/config/arm/
Darm.md1618 ;; operand1 into operand0.
1637 ;; operand1 into operand0.
2039 ; operand1 to operand0.

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