Searched refs:num_heads (Results 1 – 7 of 7) sorted by relevance
523 u32 num_heads; /* number of active crtcs */ member716 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in dce_v6_0_latency_watermark()717 (wm->num_heads * cursor_line_pair_return_time); in dce_v6_0_latency_watermark()723 if (wm->num_heads == 0) in dce_v6_0_latency_watermark()737 b.full = dfixed_const(wm->num_heads); in dce_v6_0_latency_watermark()772 (dce_v6_0_dram_bandwidth_for_display(wm) / wm->num_heads)) in dce_v6_0_average_bandwidth_vs_dram_bandwidth_for_display()792 (dce_v6_0_available_bandwidth(wm) / wm->num_heads)) in dce_v6_0_average_bandwidth_vs_available_bandwidth()846 u32 lb_size, u32 num_heads) in dce_v6_0_program_watermarks() argument860 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v6_0_program_watermarks()896 wm_high.num_heads = num_heads; in dce_v6_0_program_watermarks()[all …]
658 u32 num_heads; /* number of active crtcs */ member851 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in dce_v8_0_latency_watermark()852 (wm->num_heads * cursor_line_pair_return_time); in dce_v8_0_latency_watermark()858 if (wm->num_heads == 0) in dce_v8_0_latency_watermark()872 b.full = dfixed_const(wm->num_heads); in dce_v8_0_latency_watermark()907 (dce_v8_0_dram_bandwidth_for_display(wm) / wm->num_heads)) in dce_v8_0_average_bandwidth_vs_dram_bandwidth_for_display()927 (dce_v8_0_available_bandwidth(wm) / wm->num_heads)) in dce_v8_0_average_bandwidth_vs_available_bandwidth()981 u32 lb_size, u32 num_heads) in dce_v8_0_program_watermarks() argument990 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v8_0_program_watermarks()1022 wm_high.num_heads = num_heads; in dce_v8_0_program_watermarks()[all …]
705 u32 num_heads; /* number of active crtcs */ member898 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in dce_v10_0_latency_watermark()899 (wm->num_heads * cursor_line_pair_return_time); in dce_v10_0_latency_watermark()905 if (wm->num_heads == 0) in dce_v10_0_latency_watermark()919 b.full = dfixed_const(wm->num_heads); in dce_v10_0_latency_watermark()954 (dce_v10_0_dram_bandwidth_for_display(wm) / wm->num_heads)) in dce_v10_0_average_bandwidth_vs_dram_bandwidth_for_display()974 (dce_v10_0_available_bandwidth(wm) / wm->num_heads)) in dce_v10_0_average_bandwidth_vs_available_bandwidth()1028 u32 lb_size, u32 num_heads) in dce_v10_0_program_watermarks() argument1037 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v10_0_program_watermarks()1069 wm_high.num_heads = num_heads; in dce_v10_0_program_watermarks()[all …]
737 u32 num_heads; /* number of active crtcs */ member930 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in dce_v11_0_latency_watermark()931 (wm->num_heads * cursor_line_pair_return_time); in dce_v11_0_latency_watermark()937 if (wm->num_heads == 0) in dce_v11_0_latency_watermark()951 b.full = dfixed_const(wm->num_heads); in dce_v11_0_latency_watermark()986 (dce_v11_0_dram_bandwidth_for_display(wm) / wm->num_heads)) in dce_v11_0_average_bandwidth_vs_dram_bandwidth_for_display()1006 (dce_v11_0_available_bandwidth(wm) / wm->num_heads)) in dce_v11_0_average_bandwidth_vs_available_bandwidth()1060 u32 lb_size, u32 num_heads) in dce_v11_0_program_watermarks() argument1069 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v11_0_program_watermarks()1101 wm_high.num_heads = num_heads; in dce_v11_0_program_watermarks()[all …]
1944 u32 num_heads; /* number of active crtcs */ member2072 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in evergreen_latency_watermark()2073 (wm->num_heads * cursor_line_pair_return_time); in evergreen_latency_watermark()2078 if (wm->num_heads == 0) in evergreen_latency_watermark()2092 b.full = dfixed_const(wm->num_heads); in evergreen_latency_watermark()2114 (evergreen_dram_bandwidth_for_display(wm) / wm->num_heads)) in evergreen_average_bandwidth_vs_dram_bandwidth_for_display()2123 (evergreen_available_bandwidth(wm) / wm->num_heads)) in evergreen_average_bandwidth_vs_available_bandwidth()2157 u32 lb_size, u32 num_heads) in evergreen_program_watermarks() argument2172 if (radeon_crtc->base.enabled && num_heads && mode) { in evergreen_program_watermarks()2207 wm_high.num_heads = num_heads; in evergreen_program_watermarks()[all …]
2043 u32 num_heads; /* number of active crtcs */ member2188 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in dce6_latency_watermark()2189 (wm->num_heads * cursor_line_pair_return_time); in dce6_latency_watermark()2195 if (wm->num_heads == 0) in dce6_latency_watermark()2209 b.full = dfixed_const(wm->num_heads); in dce6_latency_watermark()2233 (dce6_dram_bandwidth_for_display(wm) / wm->num_heads)) in dce6_average_bandwidth_vs_dram_bandwidth_for_display()2242 (dce6_available_bandwidth(wm) / wm->num_heads)) in dce6_average_bandwidth_vs_available_bandwidth()2276 u32 lb_size, u32 num_heads) in dce6_program_watermarks() argument2290 if (radeon_crtc->base.enabled && num_heads && mode) { in dce6_program_watermarks()2329 wm_high.num_heads = num_heads; in dce6_program_watermarks()[all …]
8910 u32 num_heads; /* number of active crtcs */ member9103 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in dce8_latency_watermark()9104 (wm->num_heads * cursor_line_pair_return_time); in dce8_latency_watermark()9110 if (wm->num_heads == 0) in dce8_latency_watermark()9124 b.full = dfixed_const(wm->num_heads); in dce8_latency_watermark()9159 (dce8_dram_bandwidth_for_display(wm) / wm->num_heads)) in dce8_average_bandwidth_vs_dram_bandwidth_for_display()9179 (dce8_available_bandwidth(wm) / wm->num_heads)) in dce8_average_bandwidth_vs_available_bandwidth()9233 u32 lb_size, u32 num_heads) in dce8_program_watermarks() argument9242 if (radeon_crtc->base.enabled && num_heads && mode) { in dce8_program_watermarks()9275 wm_high.num_heads = num_heads; in dce8_program_watermarks()[all …]