Searched refs:mplla (Results 1 – 2 of 2) sorted by relevance
875 .mplla = { 0x3104, /* mplla cfg0 */924 .mplla = { 0x3104, /* mplla cfg0 */2322 frac_en = REG_FIELD_GET(C20_MPLLA_FRACEN, pll_state->mplla[6]); in intel_c20pll_calc_port_clock()2323 frac_quot = pll_state->mplla[8]; in intel_c20pll_calc_port_clock()2324 frac_rem = pll_state->mplla[9]; in intel_c20pll_calc_port_clock()2325 frac_den = pll_state->mplla[7]; in intel_c20pll_calc_port_clock()2326 multiplier = REG_FIELD_GET(C20_MULTIPLIER_MASK, pll_state->mplla[0]); in intel_c20pll_calc_port_clock()2327 tx_clk_div = REG_FIELD_GET(C20_MPLLA_TX_CLK_DIV_MASK, pll_state->mplla[1]); in intel_c20pll_calc_port_clock()2328 ref_clk_mpllb_div = REG_FIELD_GET(C20_REF_CLK_MPLLB_DIV_MASK, pll_state->mplla[6]); in intel_c20pll_calc_port_clock()2329 fb_clk_div4_en = REG_FIELD_GET(C20_FB_CLK_DIV4_EN, pll_state->mplla[0]); in intel_c20pll_calc_port_clock()[all …]
263 u16 mplla[10]; member