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Searched refs:min_ttu_vblank (Results 1 – 11 of 11) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/
Ddml1_display_rq_dlg_calc.c1026 double min_ttu_vblank; in dml1_rq_dlg_get_dlg_params() local
1165 min_ttu_vblank = dlg_sys_param->t_urg_wm_us; in dml1_rq_dlg_get_dlg_params()
1167 min_ttu_vblank = dml_max(dlg_sys_param->t_sr_wm_us, min_ttu_vblank); in dml1_rq_dlg_get_dlg_params()
1169 min_ttu_vblank = dml_max(dlg_sys_param->t_mclk_wm_us, min_ttu_vblank); in dml1_rq_dlg_get_dlg_params()
1170 min_ttu_vblank = min_ttu_vblank + t_calc_us; in dml1_rq_dlg_get_dlg_params()
1172 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1180 DTRACE("DLG: %s: min_ttu_vblank = %3.2f", __func__, min_ttu_vblank); in dml1_rq_dlg_get_dlg_params()
1918 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml1_rq_dlg_get_dlg_params()
1919 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml1_rq_dlg_get_dlg_params()
Ddisplay_rq_dlg_helpers.c340 ttu_regs->min_ttu_vblank); in print__ttu_regs_st()
Ddisplay_mode_structs.h678 unsigned int min_ttu_vblank; member
Ddisplay_mode_vba.h80 dml_get_pipe_attr_decl(min_ttu_vblank);
Ddisplay_mode_vba.c141 dml_get_pipe_attr_func(min_ttu_vblank, mode_lib->vba.MinTTUVBlank);
/openbsd/src/sys/dev/pci/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer_debug.c157 … (s->min_ttu_vblank * frac) / ref_clk_mhz / frac, (s->min_ttu_vblank * frac) / ref_clk_mhz % frac, in dcn10_get_hubp_states()
177 … (s->min_ttu_vblank * frac) / ref_clk_mhz / frac, (s->min_ttu_vblank * frac) / ref_clk_mhz % frac, in dcn10_get_hubp_states()
312 …>hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_vblank, in dcn10_get_ttu_states()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20.c819 double min_ttu_vblank; in dml20_rq_dlg_get_dlg_params() local
935 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20_rq_dlg_get_dlg_params()
937 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; in dml20_rq_dlg_get_dlg_params()
948 min_ttu_vblank); in dml20_rq_dlg_get_dlg_params()
1526 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml20_rq_dlg_get_dlg_params()
1527 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml20_rq_dlg_get_dlg_params()
Ddisplay_rq_dlg_calc_20v2.c819 double min_ttu_vblank; in dml20v2_rq_dlg_get_dlg_params() local
935 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20v2_rq_dlg_get_dlg_params()
937 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; in dml20v2_rq_dlg_get_dlg_params()
949 min_ttu_vblank); in dml20v2_rq_dlg_get_dlg_params()
1527 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml20v2_rq_dlg_get_dlg_params()
1528 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml20v2_rq_dlg_get_dlg_params()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c865 double min_ttu_vblank; in dml_rq_dlg_get_dlg_params() local
981 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params()
983 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; in dml_rq_dlg_get_dlg_params()
996 min_ttu_vblank); in dml_rq_dlg_get_dlg_params()
1634 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml_rq_dlg_get_dlg_params()
1635 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml_rq_dlg_get_dlg_params()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c933 double min_ttu_vblank = 0; in dml_rq_dlg_get_dlg_params() local
1051 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params()
1053 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double)htotal; in dml_rq_dlg_get_dlg_params()
1065 min_ttu_vblank); in dml_rq_dlg_get_dlg_params()
1724 disp_ttu_regs->min_ttu_vblank = min_ttu_vblank * refclk_freq_in_mhz; in dml_rq_dlg_get_dlg_params()
1725 ASSERT(disp_ttu_regs->min_ttu_vblank < dml_pow(2, 24)); in dml_rq_dlg_get_dlg_params()
/openbsd/src/sys/dev/pci/drm/amd/display/dc/core/
Damdgpu_dc.c3810 odm_pipe->ttu_regs.min_ttu_vblank = MAX_TTU; in commit_planes_for_stream()