Searched refs:mem_table (Results 1 – 14 of 14) sorted by relevance
621 dpm_table = &(data->dpm_table.mem_table); in vega20_setup_memclk_dpm_table()673 dpm_table = &(data->dpm_table.mem_table); in vega20_setup_default_dpm_tables()1078 data->dpm_table.mem_table.dpm_levels[data->dpm_table.mem_table.count - 2].value; in vega20_od8_set_feature_capabilities()1527 &(data->dpm_table.mem_table); in vega20_get_mclk_od()1529 &(data->golden_dpm_table.mem_table); in vega20_get_mclk_od()1546 &(data->golden_dpm_table.mem_table); in vega20_set_mclk_od()1572 struct vega20_single_dpm_table *mem_table = &(data->dpm_table.mem_table); in vega20_populate_umdpstate_clocks() local1575 mem_table->count > VEGA20_UMD_PSTATE_MCLK_LEVEL) { in vega20_populate_umdpstate_clocks()1577 hwmgr->pstate_mclk = mem_table->dpm_levels[VEGA20_UMD_PSTATE_MCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()1580 hwmgr->pstate_mclk = mem_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()[all …]
680 dpm_table = &(data->dpm_table.mem_table); in vega12_setup_default_dpm_tables()1042 struct vega12_single_dpm_table *mem_dpm_table = &(data->dpm_table.mem_table); in vega12_populate_umdpstate_clocks()1176 min_freq = data->dpm_table.mem_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()1184 min_freq = data->dpm_table.mem_table.dpm_state.hard_min_level; in vega12_upload_dpm_min_level()1268 max_freq = data->dpm_table.mem_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()1667 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.mem_table)); in vega12_force_dpm_highest()1669 data->dpm_table.mem_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()1670 data->dpm_table.mem_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()1671 data->dpm_table.mem_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest()1696 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.mem_table)); in vega12_force_dpm_lowest()[all …]
1371 data->dpm_table.mem_table.count = 0; in vega10_setup_default_dpm_tables()1372 dpm_table = &(data->dpm_table.mem_table); in vega10_setup_default_dpm_tables()1883 &(data->dpm_table.mem_table); in vega10_populate_all_memory_levels()3440 struct vega10_single_dpm_table *mclk_table = &(data->dpm_table.mem_table); in vega10_find_dpm_states_clocks_in_dpm_table()3501 for (count = 0; count < dpm_table->mem_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels()3502 dpm_table->mem_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels()3585 &(data->dpm_table.mem_table), in vega10_trim_dpm_states()3662 data->dpm_table.mem_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()3676 data->dpm_table.mem_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()3719 data->dpm_table.mem_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()[all …]
149 struct vega10_single_dpm_table mem_table; member
127 struct vega12_single_dpm_table mem_table; member
180 struct vega20_single_dpm_table mem_table; member
62 struct arcturus_single_dpm_table mem_table; member
1846 struct smu_11_0_dpm_table *mem_table = in smu_v11_0_set_performance_level() local1861 mclk_min = mclk_max = mem_table->max; in smu_v11_0_set_performance_level()1866 mclk_min = mclk_max = mem_table->min; in smu_v11_0_set_performance_level()1872 mclk_min = mem_table->min; in smu_v11_0_set_performance_level()1873 mclk_max = mem_table->max; in smu_v11_0_set_performance_level()
577 struct smu_11_0_dpm_table *mem_table = in arcturus_populate_umd_state_clk() local587 pstate_table->uclk_pstate.min = mem_table->min; in arcturus_populate_umd_state_clk()588 pstate_table->uclk_pstate.peak = mem_table->max; in arcturus_populate_umd_state_clk()594 mem_table->count > ARCTURUS_UMD_PSTATE_MCLK_LEVEL && in arcturus_populate_umd_state_clk()599 mem_table->dpm_levels[ARCTURUS_UMD_PSTATE_MCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
1713 struct smu_11_0_dpm_table *mem_table = in navi10_populate_umd_state_clk() local1771 pstate_table->uclk_pstate.min = mem_table->min; in navi10_populate_umd_state_clk()1772 pstate_table->uclk_pstate.peak = mem_table->max; in navi10_populate_umd_state_clk()1778 mem_table->max > NAVI10_UMD_PSTATE_PROFILING_MEMCLK && in navi10_populate_umd_state_clk()
1493 struct smu_11_0_dpm_table *mem_table = in sienna_cichlid_populate_umd_state_clk() local1504 pstate_table->uclk_pstate.min = mem_table->min; in sienna_cichlid_populate_umd_state_clk()1505 pstate_table->uclk_pstate.peak = mem_table->max; in sienna_cichlid_populate_umd_state_clk()
180 for (mem_acc = &mem_table[0]; mem_acc->name != NULL || !mem_acc; ++mem_acc) in get_reg_name()
2965 for (memtab = mem_table; in md_begin()2966 memtab < mem_table + ARRAY_SIZE (mem_table); in md_begin()
835 struct mem_access mem_table[] = variable