Searched refs:lowered (Results 1 – 25 of 67) sorted by relevance
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsCallingConv.td | 23 /// For example, this is true for i32's that were lowered from soft-float.
190 // legal and is lowered to i128 which is further lowered to a pair of i64's.
327 // f128 is not legal and is lowered to i128 which is further lowered to a pair
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| D | Relocation.txt | 31 2. Generic address nodes are lowered to some combination of target
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| D | MSA.txt | 4 Intrinsics are lowered to SelectionDAG nodes where possible in order to enable
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/ |
| D | LanaiCallingConv.td | 45 // been lowered to 2 32-bit values.
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| /openbsd/src/gnu/gcc/gcc/ |
| D | cgraphunit.c | 455 if (node->lowered) in cgraph_lower_function()
458 node->lowered = true; in cgraph_lower_function()
477 node->lowered = DECL_STRUCT_FUNCTION (decl)->cfg != NULL; in cgraph_finalize_function()
1324 node->lowered = DECL_STRUCT_FUNCTION (node->decl)->cfg != NULL; in cgraph_expand_all_functions()
1874 new_version_node->lowered = true; in cgraph_function_versioning()
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| D | cgraph.h | 160 unsigned lowered : 1; member
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| /openbsd/src/gnu/llvm/llvm/docs/GlobalISel/ |
| D | IRTranslator.rst | 69 Aggregates are lowered into multiple virtual registers, similar to
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| D | Legalizer.rst | 287 discarding bits. The other conversions can be lowered into G_ANYEXT/G_TRUNC
311 because it can usually be lowered to COPY (or to nothing using
349 they can be lowered to target instructions which are legal by definition.
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| D | GenericOpcode.rst | 102 lowered. This opcode is particularly useful if the target has sign-extension
759 will not be lowered as a call to an external function. Currently the size
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| /openbsd/src/gnu/llvm/clang/docs/ |
| D | ClangRepl.rst | 55 5. The AST representation is then lowered to LLVM IR.
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| D | SYCLSupport.rst | 55 Pointers to default address space should get lowered into a pointer to a generic
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| /openbsd/src/gnu/llvm/llvm/docs/ |
| D | Statepoints.rst | 211 When lowered, this example would generate the following x86 assembly:
403 GC_TRANSITION_START (lowered i32 *@Flag), SRCVALUE i32* Flag
405 GC_TRANSITION_END (lowered i32 *@Flag), SRCVALUE i32 *Flag
433 Before the abstract machine model is lowered to the explicit statepoint model
640 "gc-leaf-function" attribute the call is lowered to a GC leaf call to
650 '``llvm.memmove.element.unordered.atomic.*``' intrinsics are lowered to calls
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| D | GetElementPtr.rst | 289 trees involving ADD, MUL, etc., which are what GEP is lowered into. This has the
306 like ``X[a][b][c]``, must be effectively lowered into a form like
466 * Support C, C-like languages, and languages which can be conceptually lowered
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| D | RISCVUsage.rst | 111 …rn matching by the compiler to recognize idiomatic patterns which can be lowered to the associated…
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| D | Coroutines.rst | 312 lowered to a constant representing the size required for the coroutine frame.
948 The `coro.size` intrinsic is lowered to a constant representing the size of
974 The `coro.align` intrinsic is lowered to a constant representing the alignment of
1130 This intrinsic is lowered to refer to a private constant coroutine frame. The
1156 This intrinsic is lowered to refer to the `coro.begin`_ instruction. This is
1374 This intrinsic is lowered when a coroutine is split into
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| D | StackMaps.rst | 77 and whether any of the intrinsic arguments should be lowered according
220 lowered according to the calling convention specified at the
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| D | AssignmentTracking.md | 196 intrinsics are lowered to MIR `DBG_INSTR_REF` instructions. Before this happens
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | README-SSE.txt | 7 SSE Variable shift can be custom lowered to something like this, which uses a
89 Currently, the select is being lowered, which prevents the dag combiner from
479 Note: this is not a code quality issue; the custom lowered code happens to be
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| D | README-X86-64.txt | 73 lowered return value, and it would free non-C frontends from a
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| D | X86InstrCompiler.td | 101 // When using segmented stacks these are lowered into instructions which first
283 // This is lowered into a RET instruction by MCInstLower. We need
289 // This instruction is lowered to a RET followed by a MOV. The two
298 // This is lowered to a JE 2; INT3; INT3. Prior to this pseudo should be a
1088 * It is not automatic as atomic_store/load are only lowered to MOV instructions
1484 // register. Truncate can be lowered to EXTRACT_SUBREG. CopyFromReg may
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | README.txt | 127 If the i64 division is lowered to a libcall, then a safe point will (must)
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| /openbsd/src/gnu/usr.bin/perl/ |
| D | README.tru64 | 36 should be one gigabyte, but some sites/setups might have lowered that.
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| /openbsd/src/gnu/llvm/llvm/include/llvm/IR/ |
| D | Attributes.td | 275 /// this attribute will always be lowered with hardening enabled.
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| D | IntrinsicsPowerPC.td | 1029 // vpkuhum is lowered to a shuffle.
1033 // vpkuwum is lowered to a shuffle.
1037 // vpkudum is lowered to a shuffle.
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| /openbsd/src/gnu/gcc/gcc/doc/ |
| D | tree-ssa.texi | 95 lowered to gotos.
125 @code{DECL_SAVED_TREE}. It is lowered to GIMPLE by a call to
133 can return fully lowered GIMPLE, or it can return GENERIC trees and let the
135 GIMPLE that is not fully lowered is known as ``high GIMPLE'' and
372 now they are lowered to explicit gotos.
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