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Searched refs:ixSQ_WAVE_TTMP15 (Results 1 – 11 of 11) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h7126 #define ixSQ_WAVE_TTMP15 … macro
Dgc_9_4_3_offset.h7436 #define ixSQ_WAVE_TTMP15 … macro
Dgc_9_2_1_offset.h7373 #define ixSQ_WAVE_TTMP15 … macro
Dgc_9_4_2_offset.h7673 #define ixSQ_WAVE_TTMP15 … macro
Dgc_9_1_offset.h7334 #define ixSQ_WAVE_TTMP15 … macro
Dgc_11_5_0_offset.h9994 #define ixSQ_WAVE_TTMP15 … macro
Dgc_12_0_0_offset.h11049 #define ixSQ_WAVE_TTMP15 … macro
Dgc_10_1_0_offset.h11221 #define ixSQ_WAVE_TTMP15 … macro
Dgc_11_0_3_offset.h12087 #define ixSQ_WAVE_TTMP15 … macro
Dgc_11_0_0_offset.h11679 #define ixSQ_WAVE_TTMP15 … macro
Dgc_10_3_0_offset.h13458 #define ixSQ_WAVE_TTMP15 … macro