Home
last modified time | relevance | path

Searched refs:ixSQ_WAVE_IB_DBG1 (Results 1 – 16 of 16) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gca/
Dgfx_8_1_d.h2098 #define ixSQ_WAVE_IB_DBG1 0x1d macro
Dgfx_8_0_d.h2130 #define ixSQ_WAVE_IB_DBG1 0x1d macro
/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h7109 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_9_4_3_offset.h7419 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_9_2_1_offset.h7356 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_9_4_2_offset.h7657 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_9_1_offset.h7317 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_11_5_0_offset.h9969 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_12_0_0_offset.h11015 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_10_1_0_offset.h11198 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_11_0_3_offset.h12062 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_11_0_0_offset.h11655 #define ixSQ_WAVE_IB_DBG1 macro
Dgc_10_3_0_offset.h13432 #define ixSQ_WAVE_IB_DBG1 macro
/openbsd/src/sys/dev/pci/drm/amd/amdgpu/
Dgfx_v12_0.c820 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1); in gfx_v12_0_read_wave_data()
Dgfx_v11_0.c992 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1); in gfx_v11_0_read_wave_data()
Dgfx_v10_0.c4455 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_IB_DBG1); in gfx_v10_0_read_wave_data()