Searched refs:isVI (Results 1 – 6 of 6) sorted by relevance
269 bool isVI() const;
96 if (DAsm->isVI()) { // VI supports 20-bit unsigned offsets. in decodeSMEMOffset()1847 bool AMDGPUDisassembler::isVI() const { in isVI() function in AMDGPUDisassembler
1635 if (isVI(STI) || isGFX9(STI)) in getNfmtLookupTable()1948 bool isVI(const MCSubtargetInfo &STI) { in isVI() function1961 return isVI(STI) || isGFX9(STI) || isGFX10(STI); in isGFX8_GFX9_GFX10()1965 return isVI(STI) || isGFX9Plus(STI); in isGFX8Plus()1993 return isSI(STI) || isCI(STI) || isVI(STI) || isGFX9(STI); in isNotGFX10Plus()
1108 bool isVI(const MCSubtargetInfo &STI);
434 assert(!AMDGPU::isVI(STI) || isUInt<20>(Offset)); in getSMEMOffsetEncoding()
1421 bool isVI() const { in isVI() function in __anon568464980111::AMDGPUAsmParser1422 return AMDGPU::isVI(getSTI()); in isVI()1475 return !isVI() && !isGFX9(); in hasSGPR102_SGPR103()2044 if (AsmParser->isVI()) in isSDWAOperand()4170 (isVI() || IsBuffer) ? "expected a 20-bit unsigned offset" : in validateSMEMOffset()5729 return (isVI() || isGFX9()) && getTargetStreamer().getTargetID()->isXnackSupported(); in subtargetHasRegister()8559 return isVI() || isGFX9(); in isSupportedDPPCtrl()8946 cvtSDWA(Inst, Operands, SIInstrFlags::VOPC, isVI()); in cvtSdwaVOPC()