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Searched refs:isRegLoc (Results 1 – 25 of 28) sorted by relevance

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/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DCallingConvLower.cpp74 if (ValAssign.isRegLoc() && TRI.regsOverlap(ValAssign.getLocReg(), Reg)) in IsShadowAllocatedReg()
220 HaveRegParm = Locs.back().isRegLoc(); in getRemainingRegParmsForType()
226 if (Locs[I].isRegLoc()) in getRemainingRegParmsForType()
280 if (Loc1.isRegLoc() && Loc2.isRegLoc()) in resultsCompatible()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DARMCallLowering.cpp114 assert(VA.isRegLoc() && "Value shouldn't be assigned to reg"); in assignValueToReg()
152 assert(VA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
153 assert(NextVA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
285 assert(VA.isRegLoc() && "Value shouldn't be assigned to reg"); in assignValueToReg()
327 assert(VA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
328 assert(NextVA.isRegLoc() && "Value should be in reg"); in assignCustomValue()
DARMFastISel.cpp1899 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1905 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
1979 if (VA.isRegLoc() && !VA.needsCustom()) { in ProcessCallArgs()
1991 assert(VA.isRegLoc() && NextVA.isRegLoc() && in ProcessCallArgs()
2121 if (!VA.isRegLoc()) in SelectRet()
DARMISelLowering.cpp2298 if (NextVA.isRegLoc()) in PassF64ArgInRegs()
2524 if (VA.isRegLoc()) { in LowerCall()
2538 } else if (VA.isRegLoc()) { in LowerCall()
3089 if (!VA.isRegLoc()) in IsEligibleForTailCallOptimization()
3091 if (!ArgLocs[++i].isRegLoc()) in IsEligibleForTailCallOptimization()
3094 if (!ArgLocs[++i].isRegLoc()) in IsEligibleForTailCallOptimization()
3096 if (!ArgLocs[++i].isRegLoc()) in IsEligibleForTailCallOptimization()
3099 } else if (!VA.isRegLoc()) { in IsEligibleForTailCallOptimization()
3199 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
4527 if (VA.isRegLoc()) { in LowerFormalArguments()
/openbsd/src/gnu/llvm/llvm/lib/Target/ARC/
DARCISelLowering.cpp322 if (VA.isRegLoc()) { in LowerCall()
414 if (VA.isRegLoc()) { in lowerCallResult()
519 if (VA.isRegLoc()) { in LowerCallArguments()
670 if (VA.isRegLoc()) in LowerReturn()
698 if (!VA.isRegLoc()) in LowerReturn()
/openbsd/src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
DCallLowering.cpp990 if (!ArgLoc.isRegLoc()) in parametersInCSRMatch()
1069 if (Loc1.isRegLoc() != Loc2.isRegLoc()) in resultsCompatible()
1072 if (Loc1.isRegLoc()) { in resultsCompatible()
/openbsd/src/gnu/llvm/llvm/lib/Target/BPF/
DBPFISelLowering.cpp321 if (VA.isRegLoc()) { in LowerFormalArguments()
442 if (VA.isRegLoc()) in LowerCall()
527 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
/openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp281 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn_32()
364 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn_64()
462 if (VA.isRegLoc()) { in LowerFormalArguments_32()
641 if (VA.isRegLoc()) { in LowerFormalArguments_64()
953 if (VA.isRegLoc()) { in LowerCall_32()
957 if (NextVA.isRegLoc()) { in LowerCall_32()
987 if (VA.isRegLoc()) { in LowerCall_32()
1084 assert(RVLocs[i].isRegLoc() && "Can only return in registers!"); in LowerCall_32()
1149 if (!VA.isRegLoc() || (ValTy != MVT::f64 && ValTy != MVT::f128)) in fixupVariableFloatArgs()
1262 if (VA.isRegLoc()) { in LowerCall_64()
[all …]
/openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/
DCallingConvLower.h120 bool isRegLoc() const { return std::holds_alternative<Register>(Data); } in isRegLoc() function
/openbsd/src/gnu/llvm/llvm/lib/Target/XCore/
DXCoreISelLowering.cpp1065 if (VA.isRegLoc()) { in LowerCallResult()
1158 if (VA.isRegLoc()) { in LowerCCCCallTo()
1294 if (VA.isRegLoc()) { in LowerCCCArguments()
1463 if (VA.isRegLoc()) in LowerReturn()
1491 if (!VA.isRegLoc()) in LowerReturn()
/openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp454 if (VA.isRegLoc()) { in LowerCCCArguments()
560 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
690 if (VA.isRegLoc()) { in LowerCCCCallTo()
/openbsd/src/gnu/llvm/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp640 if (VA.isRegLoc()) { in LowerCCCArguments()
763 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
850 if (VA.isRegLoc()) { in LowerCCCCallTo()
/openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp1398 !VA.isRegLoc() || VA.needsCustom()) in processCallArgs()
1506 assert(VA.isRegLoc() && "Can only return in registers!"); in finishCall()
1746 assert(VA.isRegLoc() && "Can only return in registers!"); in SelectRet()
DPPCISelLowering.cpp4078 if (VA.isRegLoc()) { in LowerFormalArguments_32SVR4()
5159 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerCallResult()
5891 if (VA.isRegLoc()) { in LowerCall_32SVR4()
7004 assert(I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() && in LowerFormalArguments_AIX()
7026 if (I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom()) { in LowerFormalArguments_AIX()
7036 if (VA.isRegLoc()) { in LowerFormalArguments_AIX()
7087 assert(VA.isRegLoc() && "MemLocs should already be handled."); in LowerFormalArguments_AIX()
7129 for (; Offset != StackSize && ArgLocs[I].isRegLoc(); in LowerFormalArguments_AIX()
7151 if (VA.isRegLoc() && !VA.needsCustom()) { in LowerFormalArguments_AIX()
7311 while (LoadOffset + PtrByteSize <= ByValSize && ArgLocs[I].isRegLoc()) { in LowerCall_AIX()
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/Mips/
DMipsFastISel.cpp1223 if (VA.isRegLoc() && !VA.needsCustom()) { in processCallArgs()
1714 if (!VA.isRegLoc()) in selectRet()
DMipsISelLowering.cpp3297 if (VA.isRegLoc()) { in LowerCall()
3353 if (VA.isRegLoc()) { in LowerCall()
3513 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerCallResult()
3662 bool IsRegLoc = VA.isRegLoc(); in LowerFormalArguments()
3842 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
/openbsd/src/gnu/llvm/llvm/lib/Target/VE/
DVEISelLowering.cpp388 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
465 if (VA.isRegLoc()) { in LowerFormalArguments()
723 if (VA.isRegLoc()) { in LowerCall()
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
DAArch64CallLowering.cpp794 if (ArgLoc.isRegLoc()) in areCalleeOutgoingArgsTailCallable()
/openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp520 if (VA.isRegLoc()) in LowerCall()
831 if (VA.isRegLoc() && ByVal && Flags.getByValSize() <= 8) in LowerFormalArguments()
834 bool InReg = VA.isRegLoc() && in LowerFormalArguments()
/openbsd/src/gnu/llvm/llvm/lib/Target/AVR/
DAVRISelLowering.cpp1346 if (VA.isRegLoc()) { in LowerFormalArguments()
1672 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86FastISel.cpp1228 if (!VA.isRegLoc()) in X86SelectRet()
3385 if (VA.isRegLoc()) { in fastLowerCall()
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp3067 if (VA.isRegLoc() && !VA.needsCustom()) { in processCallArgs()
3838 if (!VA.isRegLoc()) in selectRet()
/openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp12415 assert(VA.isRegLoc() && "Expected register VA assignment"); in unpackF64OnRV32DSoftABI()
12648 else if (VA.isRegLoc()) in LowerFormalArguments()
12908 if (IsF64OnRV32DSoftABI && VA.isRegLoc()) { in LowerCall()
12992 if (VA.isRegLoc()) { in LowerCall()
13177 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
13181 assert(VA.isRegLoc() && "Expected return via registers"); in LowerReturn()
/openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp1510 if (VA.isRegLoc()) { in LowerFormalArguments()
1653 if (!VA.isRegLoc()) in canUseSiblingCall()
1762 if (VA.isRegLoc()) { in LowerCall()
1973 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp2544 assert(VA.isRegLoc() && "Parameter must be in a register!"); in LowerFormalArguments()
2676 assert(VA.isRegLoc() && "Can only return in registers!"); in LowerReturn()
2751 if (VA.isRegLoc()) { in LowerCallResult()
3239 if (VA.isRegLoc()) { in LowerCall()

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