Searched refs:hw_params (Results 1 – 16 of 16) sorted by relevance
362 switch (hsotg->hw_params.op_mode) { in dwc2_set_param_otg_cap()383 u32 hs_phy_type = hsotg->hw_params.hs_phy_type; in dwc2_set_param_phy_type()421 val = (hsotg->hw_params.utmi_phy_data_width == in dwc2_set_param_phy_utmi_width()457 if (hsotg->hw_params.hibernation) in dwc2_set_param_power_down()459 else if (hsotg->hw_params.power_optimized) in dwc2_set_param_power_down()471 p->lpm = hsotg->hw_params.lpm_mode; in dwc2_set_param_lpm()493 struct dwc2_hw_params *hw = &hsotg->hw_params; in dwc2_set_default_params()602 if (hsotg->hw_params.op_mode != GHWCFG2_OP_MODE_HNP_SRP_CAPABLE) in dwc2_check_param_otg_cap()607 switch (hsotg->hw_params.op_mode) { in dwc2_check_param_otg_cap()633 hs_phy_type = hsotg->hw_params.hs_phy_type; in dwc2_check_param_phy_type()[all …]
193 if (hsotg->hw_params.snpsid >= DWC2_CORE_REV_3_00a) in dwc2_handle_otg_intr()532 hsotg->hw_params.power_optimized, in dwc2_handle_usb_suspend_intr()533 hsotg->hw_params.hibernation); in dwc2_handle_usb_suspend_intr()787 if (hsotg->hw_params.hibernation && in dwc2_handle_gpwrdn_intr()
1102 struct dwc2_hw_params hw_params; member1327 return (hsotg->hw_params.snpsid & 0xfff00000) == 0x55300000; in dwc2_is_iot()1332 return (hsotg->hw_params.snpsid & 0xffff0000) == 0x55310000; in dwc2_is_fs_iot()1337 return (hsotg->hw_params.snpsid & 0xffff0000) == 0x55320000; in dwc2_is_hs_iot()
462 if ((hsotg->hw_params.snpsid & DWC2_CORE_REV_MASK) < in dwc2_core_reset()997 if ((hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_init_fs_ls_pclk_sel()998 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_init_fs_ls_pclk_sel()1183 if (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_ULPI && in dwc2_phy_init()1184 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED && in dwc2_phy_init()
109 switch (hsotg->hw_params.arch) { in dwc2_gahbcfg_init()156 switch (hsotg->hw_params.op_mode) { in dwc2_gusbcfg_init()249 struct dwc2_hw_params *hw = &hsotg->hw_params; in dwc2_calculate_dynamic_fifo()349 hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_91a) { in dwc2_config_fifos()388 if ((usbcfg & GUSBCFG_PHYSEL) && hsotg->hw_params.fs_phy_type == in dwc2_calc_frame_interval()401 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_SHARED_UTMI) in dwc2_calc_frame_interval()404 hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED) in dwc2_calc_frame_interval()837 hsotg->hw_params.arch == GHWCFG2_EXT_DMA_ARCH) { in dwc2_hc_halt()1936 (hsotg->hw_params.fs_phy_type == GHWCFG2_FS_PHY_TYPE_DEDICATED) && in dwc2_hcd_urb_enqueue()1937 (hsotg->hw_params.hs_phy_type == GHWCFG2_HS_PHY_TYPE_UTMI)) { in dwc2_hcd_urb_enqueue()[all …]
1423 struct dwc2_hw_params *hw = &hsotg->hw_params; in dwc2_check_core_version()
1870 if (hsotg->hw_params.snpsid >= DWC2_CORE_REV_2_71a) { in dwc2_hc_chhltd_intr_dma()
1402 return sc->hw_params.hw_ops->rx_desc_get_first_msdu(desc); in qwx_dp_rx_h_msdu_end_first_msdu()1858 if (sc->hw_params.hw_ops->get_hw_mac_from_pdev_id) in qwx_hw_get_mac_from_pdev_id()1859 return sc->hw_params.hw_ops->get_hw_mac_from_pdev_id(pdev_idx); in qwx_hw_get_mac_from_pdev_id()7988 if (!sc->hw_params.fixed_fw_mem) { in qwx_qmi_fw_ind_register_send()8030 req.mem_cfg_mode = sc->hw_params.fw_mem_mode; in qwx_qmi_host_cap_send()8035 if (sc->hw_params.m3_fw_support) { in qwx_qmi_host_cap_send()8050 if (sc->hw_params.internal_sleep_clock) { in qwx_qmi_host_cap_send()8064 if (sc->hw_params.global_reset) in qwx_qmi_host_cap_send()8226 if (!sc->hw_params.fixed_fw_mem) { in qwx_qmi_mem_seg_send()8322 if (!sc->hw_params.hybrid_bus_type) in qwx_qmi_request_device_info()[all …]
6923 (sc->hw_params.regs->hal_shadow_base_addr)7081 (sc->hw_params.regs->hal_seq_wcss_umac_ce0_src_reg)7083 (sc->hw_params.regs->hal_seq_wcss_umac_ce0_dst_reg)7085 (sc->hw_params.regs->hal_seq_wcss_umac_ce1_src_reg)7087 (sc->hw_params.regs->hal_seq_wcss_umac_ce1_dst_reg)7097 (sc->hw_params.regs->hal_tcl1_ring_base_lsb)7099 (sc->hw_params.regs->hal_tcl1_ring_base_msb)7101 (sc->hw_params.regs->hal_tcl1_ring_id)7103 (sc->hw_params.regs->hal_tcl1_ring_misc)7105 (sc->hw_params.regs->hal_tcl1_ring_tp_addr_lsb)[all …]
7298 #define HAL_TCL1_RING_ID(sc) (sc->hw_params.regs->hal_tcl1_ring_id)7300 (sc->hw_params.regs->hal_tcl1_ring_misc)7302 (sc->hw_params.regs->hal_tcl1_ring_tp_addr_lsb)7304 (sc->hw_params.regs->hal_tcl1_ring_tp_addr_msb)7306 (sc->hw_params.regs->hal_tcl1_ring_consumer_int_setup_ix0)7308 (sc->hw_params.regs->hal_tcl1_ring_consumer_int_setup_ix1)7310 (sc->hw_params.regs->hal_tcl1_ring_msi1_base_lsb)7312 (sc->hw_params.regs->hal_tcl1_ring_msi1_base_msb)7314 (sc->hw_params.regs->hal_tcl1_ring_msi1_data)7317 (sc->hw_params.regs->hal_tcl_ring_base_lsb)[all …]
1280 if (sc->hw_params.hw_ops->get_hw_mac_from_pdev_id) in qwz_hw_get_mac_from_pdev_id()1281 return sc->hw_params.hw_ops->get_hw_mac_from_pdev_id(pdev_idx); in qwz_hw_get_mac_from_pdev_id()5904 if (sc->hw_params.qmi_cnss_feature_bitmap) { in qwz_qmi_host_cap_send()5906 req.feature_list = sc->hw_params.qmi_cnss_feature_bitmap; in qwz_qmi_host_cap_send()5909 if (sc->hw_params.internal_sleep_clock) { in qwz_qmi_host_cap_send()6103 ATH12K_FW_DIR, sc->hw_params.fw.dir, filename); in qwz_loadfirmware()6669 fw_size = MIN(sc->hw_params.fw.board_size, boardfw_len); in qwz_qmi_load_bdf_qmi()6921 grp_mask = &sc->hw_params.ring_mask->rx_wbm_rel[0]; in qwz_dp_srng_calculate_msi_group()6924 map = sc->hw_params.hal_ops->tcl_to_wbm_rbm_map; in qwz_dp_srng_calculate_msi_group()6925 for (i = 0; i < sc->hw_params.max_tx_ring; i++) { in qwz_dp_srng_calculate_msi_group()[all …]
1824 struct ath11k_hw_params hw_params; member2021 KASSERT(ce_id < sc->hw_params.ce_count); in qwx_ce_get_attr_flags()2022 return sc->hw_params.host_ce_config[ce_id].flags; in qwx_ce_get_attr_flags()
1962 struct ath12k_hw_params hw_params; member2164 KASSERT(ce_id < sc->hw_params.ce_count); in qwz_ce_get_attr_flags()2165 return sc->hw_params.host_ce_config[ce_id].flags; in qwz_ce_get_attr_flags()
156 (sc->hw_params.regs->pcie_qserdes_sysclk_en_sel)160 (sc->hw_params.regs->pcie_pcs_osc_dtct_config_base)163 (sc->hw_params.regs->pcie_pcs_osc_dtct_config_base + 0x4)166 (sc->hw_params.regs->pcie_pcs_osc_dtct_config_base + 0xc)677 for (i = 0; i < sc->hw_params.svc_to_ce_map_len; i++) { in qwx_pcic_map_service_to_pipe()678 entry = &sc->hw_params.svc_to_ce_map[i]; in qwx_pcic_map_service_to_pipe()1597 if (sc->hw_params.ring_mask->tx[i] || in qwx_pcic_ext_irq_config()1598 sc->hw_params.ring_mask->rx[i] || in qwx_pcic_ext_irq_config()1599 sc->hw_params.ring_mask->rx_err[i] || in qwx_pcic_ext_irq_config()1600 sc->hw_params.ring_mask->rx_wbm_rel[i] || in qwx_pcic_ext_irq_config()[all …]
157 (sc->hw_params.regs->pcie_qserdes_sysclk_en_sel)161 (sc->hw_params.regs->pcie_pcs_osc_dtct_config_base)164 (sc->hw_params.regs->pcie_pcs_osc_dtct_config_base + 0x4)167 (sc->hw_params.regs->pcie_pcs_osc_dtct_config_base + 0xc)615 for (i = 0; i < sc->hw_params.svc_to_ce_map_len; i++) { in qwz_pcic_map_service_to_pipe()616 entry = &sc->hw_params.svc_to_ce_map[i]; in qwz_pcic_map_service_to_pipe()1479 if (sc->hw_params.ring_mask->tx[i] || in qwz_pcic_ext_irq_config()1480 sc->hw_params.ring_mask->rx[i] || in qwz_pcic_ext_irq_config()1481 sc->hw_params.ring_mask->rx_err[i] || in qwz_pcic_ext_irq_config()1482 sc->hw_params.ring_mask->rx_wbm_rel[i] || in qwz_pcic_ext_irq_config()[all …]
1162 struct dmub_srv_hw_params hw_params; in dm_dmub_hw_init() local1251 memset(&hw_params, 0, sizeof(hw_params)); in dm_dmub_hw_init()1252 hw_params.fb_base = adev->gmc.fb_start; in dm_dmub_hw_init()1253 hw_params.fb_offset = adev->vm_manager.vram_base_offset; in dm_dmub_hw_init()1257 hw_params.load_inst_const = true; in dm_dmub_hw_init()1260 hw_params.psp_version = dmcu->psp_version; in dm_dmub_hw_init()1263 hw_params.fb[i] = &fb_info->fb[i]; in dm_dmub_hw_init()1271 hw_params.dpia_supported = true; in dm_dmub_hw_init()1272 hw_params.disable_dpia = adev->dm.dc->debug.dpia_debug.bits.disable_dpia; in dm_dmub_hw_init()1281 hw_params.ips_sequential_ono = adev->external_rev_id > 0x10; in dm_dmub_hw_init()[all …]