| /openbsd/src/bin/pax/ |
| D | options.c | 169 FSUB fsub[] = { variable
492 for (i = 0; i < sizeof(fsub)/sizeof(FSUB); ++i) in pax_options()
493 if (fsub[i].name != NULL && in pax_options()
494 strcmp(fsub[i].name, optarg) == 0) in pax_options()
496 if (i < sizeof(fsub)/sizeof(FSUB)) { in pax_options()
497 frmt = &fsub[i]; in pax_options()
503 for (i = 0; i < (sizeof(fsub)/sizeof(FSUB)); ++i) in pax_options()
504 if (fsub[i].name != NULL) in pax_options()
506 fsub[i].name); in pax_options()
684 frmt = &(fsub[DEFLT]); in pax_options()
[all …]
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| D | ar_subs.c | 1183 if (fsub[ford[i]].name != NULL && fsub[ford[i]].hsz < minhd) in get_arc()
1184 minhd = fsub[ford[i]].hsz; in get_arc()
1234 if (fsub[ford[i]].id == NULL || in get_arc()
1235 (*fsub[ford[i]].id)(hdbuf, hdsz) < 0) in get_arc()
1237 frmt = &(fsub[ford[i]]); in get_arc()
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| D | extern.h | 169 extern FSUB fsub[];
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| /openbsd/src/gnu/usr.bin/binutils/gdb/testsuite/gdb.base/ |
| D | langs1.f | 4 subroutine fsub subroutine
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| /openbsd/src/gnu/usr.bin/binutils/gdb/testsuite/gdb.disasm/ |
| D | sh3.s | 30 fsub fr0,fr1
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| D | hppa.s | 1461 fsub,sgl %fr4,%fr8,%fr12
1462 fsub,dbl %fr4,%fr8,%fr12
1463 fsub,quad %fr4,%fr8,%fr12
1464 fsub,sgl %fr20,%fr24,%fr28
1465 fsub,dbl %fr20,%fr24,%fr28
1466 fsub,quad %fr20,%fr24,%fr28
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| D | hppa.exp | 1057 set fpu_three_op_insns [list {fadd} {fsub} {fmpy} {fdiv} {frem} ]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsInstrFPU.td | 213 [(set RC:$fd, (fsub fpimm0, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr)))],
678 def FSUB_S : MMRel, ADDS_FT<"sub.s", FGR32Opnd, II_SUB_S, 0, fsub>,
680 defm FSUB : ADDS_M<"sub.d", II_SUB_D, 0, fsub>, ADDS_FM<0x01, 17>,
687 def MSUB_S : MMRel, MADDS_FT<"msub.s", FGR32Opnd, II_MSUB_S, fsub>,
692 def MSUB_D32 : MMRel, MADDS_FT<"msub.d", AFGR64Opnd, II_MSUB_D, fsub>,
698 def MSUB_D64 : MADDS_FT<"msub.d", FGR64Opnd, II_MSUB_D, fsub>,
706 def NMSUB_S : MMRel, NMADDS_FT<"nmsub.s", FGR32Opnd, II_NMSUB_S, fsub>,
711 def NMSUB_D32 : MMRel, NMADDS_FT<"nmsub.d", AFGR64Opnd, II_NMSUB_D, fsub>,
717 def NMSUB_D64 : NMADDS_FT<"nmsub.d", FGR64Opnd, II_NMSUB_D, fsub>,
988 def : MipsPat<(fneg (fsub (fmul RC:$fs, RC:$ft), RC:$fr)),
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| D | MicroMipsInstrFPU.td | 31 def FSUB_S_MM : MMRel, ADDS_FT<"sub.s", FGR32Opnd, II_SUB_S, 0, fsub>,
40 defm FSUB : ADDS_MMM<"sub.d", II_SUB_D, 0, fsub>,
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| /openbsd/src/gnu/llvm/llvm/include/llvm/Target/GlobalISel/ |
| D | Combine.td | 898 // Transform (fsub +-0.0, X) -> (fneg X)
947 // Transform (fsub (fmul x, y), z) -> (fma x, y, -z)
956 // Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z))
957 // (fsub x, (fneg (fmul, y, z))) -> (fma y, z, x)
965 // Transform (fsub (fpext (fmul x, y)), z) ->
974 // Transform (fsub (fneg (fpext (fmul x, y))), z) ->
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| D | SelectionDAGCompat.td | 97 def : GINodeEquiv<G_FSUB, fsub>;
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| /openbsd/src/gnu/llvm/llvm/docs/tutorial/MyFirstLanguageFrontend/ |
| D | LangImpl07.rst | 470 %subtmp = fsub double %x3, 1.000000e+00
473 %subtmp5 = fsub double %x4, 2.000000e+00
507 %subtmp = fsub double %x, 1.000000e+00
509 %subtmp5 = fsub double %x, 2.000000e+00
535 %subtmp = fsub double %x, 1.000000e+00
537 %subtmp5 = fsub double %x, 2.000000e+00
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64SMEInstrInfo.td | 286 defm FSUB_VG2_M2Z_S : sme2_multivec_accum_add_sub_vg2<"fsub", 0b0001, MatrixOp32, ZZ_s_mul_r>;
287 defm FSUB_VG4_M4Z_S : sme2_multivec_accum_add_sub_vg4<"fsub", 0b0001, MatrixOp32, ZZZZ_s_mul_r>;
797 defm FSUB_VG2_M2Z_D : sme2_multivec_accum_add_sub_vg2<"fsub", 0b1001, MatrixOp64, ZZ_d_mul_r>;
798 defm FSUB_VG4_M4Z_D : sme2_multivec_accum_add_sub_vg4<"fsub", 0b1001, MatrixOp64, ZZZZ_d_mul_r>;
820 defm FSUB_VG2_M2Z_H : sme2_multivec_accum_add_sub_vg2<"fsub", 0b0101, MatrixOp16, ZZ_h_mul_r>;
821 defm FSUB_VG4_M4Z_H : sme2_multivec_accum_add_sub_vg4<"fsub", 0b0101, MatrixOp16, ZZZZ_h_mul_r>;
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86InstrFPStack.td | 333 // of some of the 'reverse' forms of the fsub and fdiv instructions. As such,
340 def SUB_FrST0 : FPrST0Inst <MRM5r, "fsub{r}\t{%st, $op|$op, st}">;
341 def SUB_FPrST0 : FPrST0PInst<MRM5r, "fsub{r}p\t{%st, $op|$op, st}">;
342 def SUB_FST0r : FPST0rInst <MRM4r, "fsub\t{$op, %st|st, $op}">;
343 def SUBR_FrST0 : FPrST0Inst <MRM4r, "fsub{|r}\t{%st, $op|$op, st}">;
344 def SUBR_FPrST0 : FPrST0PInst<MRM4r, "fsub{|r}p\t{%st, $op|$op, st}">;
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| /openbsd/src/gnu/llvm/llvm/utils/vim/syntax/ |
| D | llvm.vim | 29 syn keyword llvmStatement fptosi fptoui fptrunc free freeze frem fsub
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| /openbsd/src/sys/arch/hppa/hppa/ |
| D | fpemu.S | 275 FP_TABLE2(fsub,sgl,dbl,invalid,invalid)
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| /openbsd/src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 49 defm SUB : BinaryFP<fsub, "sub ", 0x93, 0xa1>;
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| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoD.td | 118 defm FSUB_D : FPALU_rr_frm_m<0b0000101, "fsub.d", DINX>;
127 defm : FPALUDynFrmAlias_m<FSUB_D, "fsub.d", DINX>;
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| D | RISCVInstrInfoZfh.td | 113 defm FSUB_H : FPALU_rr_frm_m<0b0000110, "fsub.h", HINX>;
122 defm : FPALUDynFrmAlias_m<FSUB_H, "fsub.h", HINX>;
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| /openbsd/src/gnu/gcc/gcc/config/m88k/ |
| D | m88k.md | 2384 ;; not preserved. Interestingly, fsub does conform.
2396 "fsub.dss %0,%1,%#r0"
2416 "fsub.sds %0,%1,%#r0"
2610 "fsub.dss %0,%1,%2"
2618 "fsub.dds %0,%1,%2"
2626 "fsub.dsd %0,%1,%2"
2634 "fsub.ddd %0,%1,%2"
2642 "fsub.sss %0,%1,%2"
3742 fsub.ssd %0,%#r0,%1
3743 fsub.ssd %0,%#x0,%1"
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| /openbsd/src/gnu/usr.bin/gcc/gcc/config/m88k/ |
| D | m88k.md | 2416 ;; not preserved. Interestingly, fsub does conform.
2428 "fsub.dss %0,%1,%#r0"
2448 "fsub.sds %0,%1,%#r0"
2642 "fsub.dss %0,%1,%2"
2650 "fsub.dds %0,%1,%2"
2658 "fsub.dsd %0,%1,%2"
2666 "fsub.ddd %0,%1,%2"
2674 "fsub.sss %0,%1,%2"
3780 fsub.ssd %0,%#r0,%1
3781 fsub.ssd %0,%#x0,%1"
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | README.txt | 104 fsub f0, f0, f1
554 %D = fsub double -0.000000e+00, %A ; <double> [#uses=1]
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| /openbsd/src/gnu/llvm/llvm/include/llvm/IR/ |
| D | VPIntrinsics.def | 278 // llvm.vp.fsub(x,y,mask,vlen)
279 HELPER_REGISTER_BINARY_FP_VP(fsub, VP_FSUB, FSub)
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| /openbsd/src/gnu/llvm/llvm/utils/ |
| D | llvm.grm | 58 ArithmeticOps ::= + OptNW add | fadd | OptNW sub | fsub | OptNW mul | fmul |
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonPatternsHVX.td | 441 def: OpR_RR_pat_conv_hf<V6_vsub_hf, pf2<fsub>, VecF16, HVF16>;
444 def: OpR_RR_pat_conv<V6_vsub_sf, pf2<fsub>, VecF32, HVF32>;
465 def: Pat<(fsub HVF16:$Rs, HVF16:$Rt),
467 def: Pat<(fsub HVF32:$Rs, HVF32:$Rt),
|