| /openbsd/src/usr.sbin/ospfd/ |
| D | rde_lsdb.c | 136 u_int16_t a16, b16; in lsa_newer() local 157 b16 = ntohs(b->ls_chksum); in lsa_newer() 159 if (a16 > b16) in lsa_newer() 161 if (a16 < b16) in lsa_newer() 165 b16 = ntohs(b->age); in lsa_newer() 167 if (a16 >= MAX_AGE && b16 >= MAX_AGE) in lsa_newer() 169 if (b16 >= MAX_AGE) in lsa_newer() 174 i = b16 - a16; in lsa_newer()
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| /openbsd/src/usr.sbin/ospf6d/ |
| D | rde_lsdb.c | 140 u_int16_t a16, b16; in lsa_newer() local 161 b16 = ntohs(b->ls_chksum); in lsa_newer() 163 if (a16 > b16) in lsa_newer() 165 if (a16 < b16) in lsa_newer() 169 b16 = ntohs(b->age); in lsa_newer() 171 if (a16 >= MAX_AGE && b16 >= MAX_AGE) in lsa_newer() 173 if (b16 >= MAX_AGE) in lsa_newer() 178 i = b16 - a16; in lsa_newer()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/NVPTX/ |
| D | NVPTXIntrinsics.td | 2137 defm INT_PTX_LDU_GLOBAL_f16 : LDU_G<"b16 \t$result, [$src];", Float16Regs>; 2190 : VLDU_G_ELE_V2<"v2.b16 \t{{$dst1, $dst2}}, [$src];", Float16Regs>; 2208 : VLDU_G_ELE_V4<"v4.b16 \t{{$dst1, $dst2, $dst3, $dst4}}, [$src];", 2253 : LDG_G<"b16 \t$result, [$src];", Float16Regs>; 2312 : VLDG_G_ELE_V2<"v2.b16 \t{{$dst1, $dst2}}, [$src];", Float16Regs>; 2328 : VLDG_G_ELE_V4<"v4.b16 \t{{$dst1, $dst2, $dst3, $dst4}}, [$src];", Float16Regs>; 2391 "mov.b16 \t$r, $s;", 3822 defm SULD_1D_I16_CLAMP : SULD_1D<"suld.b.1d.b16.clamp", Int16Regs>; 3827 defm SULD_1D_I16_TRAP : SULD_1D<"suld.b.1d.b16.trap", Int16Regs>; 3832 defm SULD_1D_I16_ZERO : SULD_1D<"suld.b.1d.b16.zero", Int16Regs>; [all …]
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| D | NVPTXInstrInfo.td | 652 defm SELP_b16 : SELP_PATTERN<"b16", i16, Int16Regs, i16imm, imm>; 661 defm SELP_f16 : SELP_PATTERN<"b16", f16, Float16Regs, f16imm, fpimm>; 1022 // the constant into a register using mov.b16. 1025 "mov.b16 \t$dst, $a;", []>; 1339 // Template for three-arg bitwise operations. Takes three args, Creates .b16, 1352 !strconcat(OpcStr, ".b16 \t$dst, $a, $b;"), 1356 !strconcat(OpcStr, ".b16 \t$dst, $a, $b;"), 1384 "not.b16 \t$dst, $src;", 1640 // boolean predicate, e.g. setp.eq.and.b16. 1659 defm SETP_b16 : SETP<"b16", Int16Regs, i16imm>; [all …]
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| /openbsd/src/sys/dev/pci/ |
| D | emuxki.c | 1249 (voice->stereo ? 28 : 30) * (voice->b16 + 1); in emuxki_channel_commit_parms() 1260 (voice->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT) | start); in emuxki_channel_commit_parms() 1309 sample = voice->b16 ? 0x00000000 : 0x80808080; in emuxki_channel_start() 1310 cache_invalid_size = (voice->stereo ? 28 : 30) * (voice->b16 + 1); in emuxki_channel_start() 1485 voice->b16 = 0; in emuxki_voice_new() 1600 u_int8_t b16, u_int32_t srate) in emuxki_voice_set_audioparms() argument 1617 if (voice->stereo == stereo && voice->b16 == b16 && in emuxki_voice_set_audioparms() 1624 stereo ? "stereo" : "mono", (b16 + 1) * 8, srate); in emuxki_voice_set_audioparms() 1627 voice->b16 = b16; in emuxki_voice_set_audioparms() 1657 sample_size = (voice->b16 + 1) * (voice->stereo + 1); in emuxki_voice_set_bufparms() [all …]
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| D | emuxkivar.h | 190 u_int8_t b16; member
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| /openbsd/src/gnu/usr.bin/perl/t/op/ |
| D | aassign.t | 260 our ($a16, $b16); 261 ($a16, undef, $b16) = 1..30; 262 is("$a16:$b16", "1:3", "surplus RHS junk");
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| /openbsd/src/gnu/usr.bin/binutils/gdb/testsuite/gdb.cp/ |
| D | psmang2.cc | 112 int b16; variable
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| /openbsd/src/gnu/llvm/llvm/docs/ |
| D | AMDGPUInstructionSyntax.rst | 119 d16_x b16 1 123 d16_format_x b16 1
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| D | AMDGPUOperandSyntax.rst | 1042 i16, u16, b16 16 num.u16 Truncate to 16 bits. 1109 …i16, u16, b16 f16 f16(num) Convert to f16 and use bits of the result as an …
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARC/ |
| D | ARCInstrFormats.td | 155 class F32_BR<bits<5> major, dag outs, dag ins, bit b16, string asmstr, 161 let Inst{16} = b16; 165 class F32_BR_COND<bits<5> major, dag outs, dag ins, bit b16, string asmstr, 167 F32_BR<major, outs, ins, b16, asmstr, pattern> { 175 class F32_BR_UCOND_FAR<bits<5> major, dag outs, dag ins, bit b16, string asmstr, 177 F32_BR<major, outs, ins, b16, asmstr, pattern> {
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| /openbsd/src/gnu/llvm/llvm/include/llvm/IR/ |
| D | IntrinsicsNVVM.td | 194 // ldmatrix b16 -> s32 @ m8n8 195 !eq(gft,"m8n8:x1:b16") : !listsplat(llvm_i32_ty, 1), 196 !eq(gft,"m8n8:x2:b16") : !listsplat(llvm_i32_ty, 2), 197 !eq(gft,"m8n8:x4:b16") : !listsplat(llvm_i32_ty, 4), 401 ["m8n8"], ["x1", "x2", "x4"], ["b16"]>.ret; 532 // Only currently support m8n8 and b16 533 !and(!eq(g, "m8n8"), !eq(t, "b16")): true,
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| /openbsd/src/gnu/llvm/llvm/docs/AMDGPU/ |
| D | AMDGPUAsmGFX11.rst | 1479 …11_src_25d8ac>`, :ref:`src2<amdgpu_synid_gfx11_src_9cb8cf>`::ref:`b16<amdgpu_synid_gfx11_… 1480 …11_src_25d8ac>`, :ref:`src2<amdgpu_synid_gfx11_src_9cb8cf>`::ref:`b16<amdgpu_synid_gfx11_… 1498 …_gfx11_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx11_src_25d8ac>`::ref:`b16<amdgpu_synid_gfx11_… 1596 …_gfx11_m_c141fc>`, :ref:`src1<amdgpu_synid_gfx11_src_25d8ac>`::ref:`b16<amdgpu_synid_gfx11_… 1940 …1_vsrc_6802ce>`, :ref:`src2<amdgpu_synid_gfx11_src_d5ffa3>`::ref:`b16<amdgpu_synid_gfx11_… 1941 …1_vsrc_6802ce>`, :ref:`src2<amdgpu_synid_gfx11_src_d5ffa3>`::ref:`b16<amdgpu_synid_gfx11_… 1957 …fx11_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx11_vsrc_6802ce>`::ref:`b16<amdgpu_synid_gfx11_… 2021 …fx11_m_c141fc>`, :ref:`vsrc1<amdgpu_synid_gfx11_vsrc_6802ce>`::ref:`b16<amdgpu_synid_gfx11_… 2284 …1_vsrc_6802ce>`, :ref:`src2<amdgpu_synid_gfx11_src_d5ffa3>`::ref:`b16<amdgpu_synid_gfx11_… 2285 …1_vsrc_6802ce>`, :ref:`src2<amdgpu_synid_gfx11_src_d5ffa3>`::ref:`b16<amdgpu_synid_gfx11_… [all …]
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| D | AMDGPUAsmGFX90a.rst | 1158 …90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>`::ref:`b16<amdgpu_synid_gfx90a… 1159 …90a_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx90a_src_d95796>`::ref:`b16<amdgpu_synid_gfx90a…
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| D | AMDGPUAsmGFX9.rst | 1235 …d_gfx9_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx9_src_d95796>`::ref:`b16<amdgpu_synid_gfx9_t… 1236 …d_gfx9_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx9_src_d95796>`::ref:`b16<amdgpu_synid_gfx9_t…
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| D | AMDGPUAsmGFX940.rst | 1152 …940_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx940_src_d95796>`::ref:`b16<amdgpu_synid_gfx940… 1153 …940_src_d578c4>`, :ref:`src2<amdgpu_synid_gfx940_src_d95796>`::ref:`b16<amdgpu_synid_gfx940…
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| D | AMDGPUAsmGFX1030.rst | 1418 …030_src_207976>`, :ref:`src2<amdgpu_synid_gfx1030_src_1facfe>`::ref:`b16<amdgpu_synid_gfx103… 1419 …030_src_207976>`, :ref:`src2<amdgpu_synid_gfx1030_src_1facfe>`::ref:`b16<amdgpu_synid_gfx103…
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| D | AMDGPUAsmGFX10.rst | 1510 …gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>`::ref:`b16<amdgpu_synid_gfx10_… 1511 …gfx10_src_cf1cda>`, :ref:`src2<amdgpu_synid_gfx10_src_c27036>`::ref:`b16<amdgpu_synid_gfx10_…
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| /openbsd/src/gnu/usr.bin/perl/pod/ |
| D | perlpacktut.pod | 559 template C<'b16'>. To obtain the individual bit values from the bit 567 split( //, unpack( 'b16', $status ) );
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 688 def B16_MM : UncondBranchMM16<"b16">, B16_FM, ISA_MICROMIPS32_NOT_MIPS32R6;
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| D | MicroMips32r6InstrInfo.td | 1730 def : MipsInstAlias<"b16 $offset", (BC16_MMR6 brtarget10_mm:$offset), 0>,
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 281 def B16 : AArch64Reg<16, "b16">, DwarfRegNum<[80]>;
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