Searched refs:assembler (Results 1 – 25 of 536) sorted by relevance
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36 This option instructs the assembler to mark the resulting object file40 emitted by the assembler. All it does is turn on the EF_IA_64_CONS_GP44 This option instructs the assembler to mark the resulting object file52 affect the machine code emitted by the assembler. All it does is59 These options select the data model. The assembler defaults to @code{-mlp64}75 These options control what the assembler will do when performing77 will make the assembler issue a warning when an unwind directive check79 assembler issue an error when an unwind directive check fails.84 These options control what the assembler will do when the @samp{hint.b}85 instruction is used. @code{-mhint.b=ok} will make the assembler accept[all …]
37 This option switches the assembler in the M68HC11 mode. In this mode,38 the assembler only accepts 68HC11 operands and mnemonics. It produces43 This option switches the assembler in the M68HC12 mode. In this mode,44 the assembler also accepts 68HC12 operands and mnemonics. It produces50 This option switches the assembler in the M68HCS12 mode. This mode is177 @samp{PC}. The assembler will use the smaller post-byte definition180 the assembler it will use the 16-bit constant offset post-byte and the value228 The assembler supports several modifiers when using symbol addresses239 This modifier indicates to the assembler and linker to use288 @cindex assembler directives, M68HC11[all …]
56 This option can be used to restore the assembler's default behaviour of62 This option tells the assembler to produce little-endian code and72 This option tells the assembler to produce big-endian code and82 This option specifies that the output of the assembler should be87 This option tells the assembler to attempts to combine two sequential103 This option tells the assembler to attempt to optimize the137 This option tells the assembler's to stop checking parallel144 This option restores the assembler's default behaviour of checking159 This option tells the assembler to produce a warning message if a262 line option. It tells the assembler to only accept M32R instructions[all …]
16 This chapter covers features of the @sc{gnu} assembler that are specific32 The Xtensa version of the @sc{gnu} assembler supports these53 Indicate to the assembler whether @code{L32R} instructions use absolute65 that the assembler will always align instructions like @code{LOOP} that82 Enable or disable all assembler transformations of Xtensa instructions,97 @cindex syntax, Xtensa assembler98 @cindex Xtensa assembler syntax132 The assembler will automatically search for a format that can encode the142 The assembler can automatically bundle opcodes into FLIX instructions.168 opcode produced by the assembler. Using this feature unnecessarily[all …]
16 This chapter covers features of the @sc{gnu} assembler that are specific32 The Xtensa version of the @sc{gnu} assembler supports these55 whether assembler optimizations are performed, making these options61 Enable or disable all assembler transformations of Xtensa instructions,67 @c except that it also disables assembler optimizations (@pxref{Xtensa91 that the assembler will always align instructions like @code{LOOP} that106 @cindex syntax, Xtensa assembler107 @cindex Xtensa assembler syntax138 The Xtensa assembler distinguishes between @dfn{generic} and142 leading underscore are generic, which means the assembler is required to[all …]
55 This option can be used to restore the assembler's default behaviour of61 This option tells the assembler to produce little-endian code and71 This option tells the assembler to produce big-endian code and81 This option specifies that the output of the assembler should be86 This option tells the assembler to attempts to combine two sequential96 This option tells the assembler to attempt to optimize the130 This option tells the assembler's to stop checking parallel137 This option restores the assembler's default behaviour of checking152 This option tells the assembler to produce a warning message if a255 line option. It tells the assembler to only accept M32R instructions[all …]
36 This option instructs the assembler to mark the resulting object file40 emitted by the assembler. All it does is turn on the EF_IA_64_CONS_GP44 This option instructs the assembler to mark the resulting object file52 affect the machine code emitted by the assembler. All it does is59 These options select the data model. The assembler defaults to @code{-mlp64}74 This option instructs the assembler to automatically insert stop bits where necessary86 The assembler syntax closely follows the IA-64 Assembly Language119 In addition, the assembler defines a number of aliases:125 For convenience, the assembler also defines aliases for all named application136 The assembler defines bit masks for each of the bits in the IA-64
37 This option specifies the target processor. The assembler will issue an104 assembler to accept instructions valid for any ARM processor.106 In addition to the basic instruction set, the assembler can be told to 118 This option specifies the target architecture. The assembler will issue143 @code{-march} are specified, the assembler will use153 assembler will issue an error message if an attempt is made to assemble178 also affects the way in which the @code{.double} assembler directive behaves182 later, the default is to assembler for VFP instructions; for earlier 187 This option specifies that the assembler should start assembling Thumb193 This option specifies that the output generated by the assembler should[all …]
14 # assembler does not accept # line number as a comment.17 # to support the Intel assembler.27 $(GCC_FOR_TARGET) -I. -c -o crtbegin.o -x assembler-with-cpp \30 $(GCC_FOR_TARGET) -I. -c -o crtend.o -x assembler-with-cpp \34 -x assembler-with-cpp \37 $(GCC_FOR_TARGET) -I. -DSHARED -c -o crtendS.o -x assembler-with-cpp \
15 # assembler does not accept # line number as a comment.18 # to support the Intel assembler.28 $(GCC_FOR_TARGET) -I. -c -o crtbegin.o -x assembler-with-cpp \31 $(GCC_FOR_TARGET) -I. -c -o crtend.o -x assembler-with-cpp \35 -x assembler-with-cpp \38 $(GCC_FOR_TARGET) -I. -DSHARED -c -o crtendS.o -x assembler-with-cpp \
8 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crt1.o -x assembler-with-cpp $(srcdir)/config/sparc…10 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/sparc…12 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/sparc…14 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -DGCRT1 -o $(T)gcrt1.o -x assembler-with-cpp $(srcdir)/con…
9 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crt1.o -x assembler-with-cpp $(srcdir)/config/sparc…11 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/sparc…13 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/sparc…15 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -DGCRT1 -o $(T)gcrt1.o -x assembler-with-cpp $(srcdir)/con…
71 /* Define if your assembler supports specifying the maximum number75 /* Define if your assembler supports .balign and .p2align. */78 /* Define if your assembler uses the old HImode fild and fist notation. */288 /* Define to enable the use of a default assembler. */557 /* Define if your assembler supports .subsection and .subsection -1 starts561 /* Define if your assembler supports .weak. */564 /* Define if your assembler supports .hidden. */567 /* Define if your assembler supports .uleb128. */570 /* Define if your assembler mis-optimizes .eh_frame data. */573 /* Define if your assembler supports marking sections with SHF_MERGE flag. */[all …]
65 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crt1.o -x assembler-with-cpp $(srcdir)/config/sh/cr…67 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/sh/cr…69 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/sh/cr…83 …ate_array_4-100.o -DL_ic_invalidate_array -DWAYS=1 -DWAY_SIZE=0x2000 -x assembler-with-cpp $(srcdi…88 …ate_array_4-200.o -DL_ic_invalidate_array -DWAYS=2 -DWAY_SIZE=0x2000 -x assembler-with-cpp $(srcdi…93 …(T)ic_invalidate_array_4a.o -DL_ic_invalidate_array -D__FORCE_SH4A__ -x assembler-with-cpp $(srcdi…98 $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $@ -DL_sdivsi3_i4i -x assembler-with-cpp $<100 $(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $@ -DL_udivsi3_i4i -x assembler-with-cpp $<
7 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)crt1-mmu.o -DMMU_SUPPORT -x assembler-with-cpp $(sr…11 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)gcrt1-mmu.o -DPROFILE -DMMU_SUPPORT -x assembler-wi…15 …$(GCC_FOR_TARGET) $(MULTILIB_CFLAGS) -c -o $(T)gcrt1.o -DPROFILE -x assembler-with-cpp $(srcdir)/c…
6 * Added PIC m32r Linux (ELF) and support to M32R assembler.15 specification has been added to the arm assembler.29 * Added -n switch for x86 assembler. By default, x86 GAS replaces34 * Removed -n option from MIPS assembler. It was not useful, and confused the45 * An assembler test generator has been contributed and an example file that77 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for 83 the ARM assembler.88 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated91 * The MIPS assembler no longer issues a warning by default when it 145 * New pseudo-ops .func,.endfunc to aid in debugging user-written assembler code.[all …]
10 $! Command file to build a GNU assembler on VMS17 $! assembler, and you wish to compile without the "const=" hack,19 $! definition, and then use that assembler to rebuild it without the20 $! "const=" definition. Failure to do this will result in an assembler
7 $! Command file to build a GNU assembler on VMS14 $! assembler, and you wish to compile without the "const=" hack,16 $! definition, and then use that assembler to rebuild it without the17 $! "const=" definition. Failure to do this will result in an assembler
8 class assembler {14 assembler obj;
23 char *assembler; /* how to disassemble this instruction */ member29 char * assembler; /* how to disassemble this instruction */ member
31 assembler.76 * Added PIC m32r Linux (ELF) and support to M32R assembler.85 specification has been added to the arm assembler.99 * Added -n switch for x86 assembler. By default, x86 GAS replaces104 * Removed -n option from MIPS assembler. It was not useful, and confused the115 * An assembler test generator has been contributed and an example file that147 * The ARM assembler now accepts -march=..., -mcpu=... and -mfpu=... for 153 the ARM assembler.158 * The MIPS assembler now accepts -march/-mtune. -mcpu has been deprecated161 * The MIPS assembler no longer issues a warning by default when it [all …]
10 # assembler from generating stubbable PUSHJ relocs, because that will add24 $(CRTSTUFF_T_CFLAGS) -c -o $(T)crti.o -x assembler-with-cpp \29 $(CRTSTUFF_T_CFLAGS) -c -o $(T)crtn.o -x assembler-with-cpp \
1 # This test does not compile on mips-irix6 using the native assembler,3 # distinguish which assembler is being used, always pass -S for irix.
29 -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/bfin/crti.s33 -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/bfin/crtn.s37 -c -o $(T)crtlibid.o -x assembler-with-cpp \