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Searched refs:WB_ISR (Results 1 – 2 of 2) sorted by relevance

/openbsd/src/sys/dev/pci/
Dif_wb.c565 if ((CSR_READ_4(sc, WB_ISR) & WB_ISR_TX_IDLE) && in wb_setcfg()
566 (CSR_READ_4(sc, WB_ISR) & WB_ISR_RX_IDLE)) in wb_setcfg()
957 if (CSR_READ_4(sc, WB_ISR) & WB_RXSTATE_SUSPEND) in wb_rxeoc()
1064 status = CSR_READ_4(sc, WB_ISR); in wb_intr()
1066 CSR_WRITE_4(sc, WB_ISR, status); in wb_intr()
1420 CSR_WRITE_4(sc, WB_ISR, 0xFFFFFFFF); in wb_init()
Dif_wbreg.h46 #define WB_ISR 0x14 /* interrupt status register */ macro