| /openbsd/src/gnu/usr.bin/gcc/gcc/testsuite/gcc.dg/ |
| D | 20030225-1.c | 16 #define W5 1609 /* 2048*sqrt(2)*cos(5*pi/16) */ macro
53 X6 = (X8 - (W3 - W5) * X6) >> 3; in idct_int32()
54 X7 = (X8 - (W3 + W5) * X7) >> 3; in idct_int32()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/ |
| D | BPFCallingConv.td | 37 CCIfType<[i32], CCAssignToRegWithShadow<[W1, W2, W3, W4, W5],
42 [W1, W2, W3, W4, W5]>>,
|
| /openbsd/src/regress/lib/libcrypto/x509/bettertls/certificates/ |
| D | 2688.key | 15 RuaiqPdGyZBSEoRh5LDyx/W5+t9OIXaPlGksZlTmJ+fBrdA5tY3jCssCgYEAp78+
|
| D | 1729.key | 5 VOYdV6srarVWQkkNY/cAjJdrwuI8Hhd7rbslM+H1jNKOrQgoOhmnKv4q/W5+nt+N
|
| D | 64.chain | 42 hNSWV/W5///tl68AHLcmN5WZ7t6UgDFWtbHvtSsszJVzgeGAFEEMut0TVEV6kMhG
|
| D | 1802.chain | 12 W5+CfUN02LrJ5tCwbH7GAwY9CimidxXqGOx0LQt2TZsUzUMLW59wcFr8ht6KqSYI
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonCallingConv.td | 119 CCAssignToReg<[W0,W1,W2,W3,W4,W5,W6,W7]>>>,
133 CCAssignToReg<[W0,W1,W2,W3,W4,W5,W6,W7]>>>,
|
| D | HexagonRegisterInfo.cpp | 86 W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, 0 in getCallerSavedRegs()
|
| D | HexagonRegisterInfo.td | 237 def W5 : Rd<10, "v11:10", [V10, V11, VF5]>, DwarfRegNum<[109]>;
274 def VQ2 : Rd< 8, "v11:8", [W4, W5]>, DwarfRegNum<[254]>;
|
| /openbsd/src/games/boggle/ |
| D | README | 55 Vancouver, B.C. V6T 1W5 | brachman%ubc.csnet@csnet-relay.arpa
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/Disassembler/ |
| D | BPFDisassembler.cpp | 113 BPF::W0, BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5,
|
| /openbsd/src/games/boggle/boggle/ |
| D | helpfile | 59 Vancouver, B.C. V6T 1W5 | brachman%ubc.csnet@csnet-relay.arpa
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.td | 93 CCIfType<[i32], CCAssignToReg<[W0, W1, W2, W3, W4, W5, W6, W7]>>,
137 CCIfType<[i32], CCAssignToReg<[W0, W1, W2, W3, W4, W5, W6, W7]>>,
245 CCIfType<[i32], CCAssignToReg<[W0, W1, W2, W3, W4, W5, W6, W7]>>,
341 CCIfType<[i32], CCAssignToReg<[W0, W1, W2, W3, W4, W5, W6, W7]>>,
|
| D | AArch64RegisterInfo.td | 73 def W5 : AArch64Reg<5, "w5" >, DwarfRegNum<[5]>;
109 def X5 : AArch64Reg<5, "x5", [W5]>, DwarfRegAlias<W5>;
|
| D | AArch64FastISel.cpp | 2961 AArch64::W5, AArch64::W6, AArch64::W7 }, in fastLowerArguments()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 36 case AArch64::X5: return AArch64::W5; in getWRegFromXReg()
76 case AArch64::W5: return AArch64::X5; in getXRegFromWReg()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCTargetDesc.cpp | 77 {codeview::RegisterId::ARM64_W5, AArch64::W5}, in initLLVMToCVRegMapping()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/Disassembler/ |
| D | HexagonDisassembler.cpp | 627 Hexagon::W5, Hexagon::WR5, Hexagon::W6, Hexagon::WR6, Hexagon::W7, in DecodeHvxWRRegisterClass()
|
| /openbsd/src/etc/ |
| D | pf.os | 229 S4:64:1:60:M*,S,T,N,W5: Linux:2.6::Linux 2.6 (newer, 1)
|
| /openbsd/src/gnu/usr.bin/gcc/gcc/config/pa/ |
| D | pa.md | 195 (define_insn_reservation "W5" 14
235 (define_bypass 13 "W5" "W10" "hppa_fpstore_bypass_p")
|
| /openbsd/src/gnu/gcc/gcc/config/pa/ |
| D | pa.md | 234 (define_insn_reservation "W5" 14
274 (define_bypass 13 "W5" "W10" "hppa_fpstore_bypass_p")
|