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Searched refs:Vm (Results 1 – 15 of 15) sorted by relevance

/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/
DARMInstrNEON.td2511 (ins DPR:$Vm), IIC_VUNAD, OpcodeStr, Dt,"$Vd, $Vm", "",
2512 [(set DPR:$Vd, (ResTy (OpNode (OpTy DPR:$Vm))))]>;
2517 (ins QPR:$Vm), IIC_VUNAQ, OpcodeStr, Dt,"$Vd, $Vm", "",
2518 [(set QPR:$Vd, (ResTy (OpNode (OpTy QPR:$Vm))))]>;
2526 (ins DPR:$Vm), itin, OpcodeStr, Dt, "$Vd, $Vm", "",
2527 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vm))))]>;
2533 (ins QPR:$Vm), itin, OpcodeStr, Dt, "$Vd, $Vm", "",
2534 [(set QPR:$Vd, (ResTy (IntOp (OpTy QPR:$Vm))))]>;
2540 : N2Vnp<op19_18, op17_16, op10_8, op7, 0, (outs DPR:$Vd), (ins DPR:$Vm),
2542 [(set DPR:$Vd, (ResTy (IntOp (OpTy DPR:$Vm))))]>;
[all …]
DARMInstrCDE.td360 iname#"\t$coproc, $Vd, $Vm, $imm", params.Cstr> {
375 bits<5> Vm;
379 let Inst{3-0} = Vm{4-1};
380 let Inst{5} = Vm{0};
388 bits<5> Vm;
392 let Inst{3-0} = Vm{3-0};
393 let Inst{5} = Vm{4};
430 iname#"\t$coproc, $Vd, $Vn, $Vm, $imm", params.Cstr> {
443 bits<5> Vm;
450 let Inst{5} = Vm{0};
[all …]
DARMInstrFormats.td2332 bits<5> Vm;
2336 let Inst{3-0} = Vm{3-0};
2337 let Inst{5} = Vm{4};
2345 OpcodeStr, Dt, "$Vd, $Vm", "", pattern> {
2347 bits<5> Vm;
2352 let Inst{5} = Vm{4};
2353 let Inst{3-0} = Vm{3-0};
2385 bits<5> Vm;
2389 let Inst{3-0} = Vm{3-0};
2390 let Inst{5} = Vm{4};
[all …]
/openbsd/src/regress/lib/libcrypto/x509/bettertls/certificates/
D3526.crt11 Hm3JntcfA21JiJxjky8xx2zgX4gReL81WtgQsoGY73LCF08MjV/uA3oSvvqc/0Vm
D1977.key9 TKUGKKCZknwNV11KSfrFEG2kxniVlBh76/4WaEvPXa9D8a0I3SMAQgt9EHUY/7Vm
D1800.key23 Vm+hRm5LNHOVevjcTEQDYLf9zQ+LGZTwtHKoLC99qL6IxaCswUaxy0K15jXd0qba
D3540.chain41 AQEAg6KIsHcbmeivWXoKsIJ24HHQgkLr0jLB7s0QAxuEaXY/COLsZwHDstpwG+Vm
D1589.chain11 DbQKnRzmc4FUSHDrc8gQfIM/SpoLI4nk/Vm+J7/L+h93qK9Yj/X17C0LZ5hgXYLg
/openbsd/src/distrib/syspatch/
Dbsd.syspatch.mk28 FETCH= /usr/bin/ftp -Vm
/openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td1159 : Pat<(VecTy (OpNode (VecTy V128:$Vd), (VecTy V128:$Vn), (VecTy V128:$Vm))),
1160 (INST (VecTy V128:$Vd), (VecTy V128:$Vn), (VecTy V128:$Vm))>;
1162 def : Pat<(v2i64 (int_aarch64_crypto_sha512su0 (v2i64 V128:$Vn), (v2i64 V128:$Vm))),
1163 (SHA512SU0 (v2i64 V128:$Vn), (v2i64 V128:$Vm))>;
1175 : Pat<(xor (xor (VecTy V128:$Vn), (VecTy V128:$Vm)), (VecTy V128:$Va)),
1176 (EOR3 (VecTy V128:$Vn), (VecTy V128:$Vm), (VecTy V128:$Va))>;
1184 : Pat<(xor (VecTy V128:$Vn), (and (VecTy V128:$Vm), (vnot (VecTy V128:$Va)))),
1185 (BCAX (VecTy V128:$Vn), (VecTy V128:$Vm), (VecTy V128:$Va))>;
1207 def : Pat<(v2i64 (int_aarch64_crypto_rax1 (v2i64 V128:$Vn), (v2i64 V128:$Vm))),
1208 (RAX1 (v2i64 V128:$Vn), (v2i64 V128:$Vm))>;
[all …]
DAArch64InstrFormats.td7797 : I<(outs vectype:$Vd), (ins listtype:$Vn, vectype:$Vm), asm,
7798 "\t$Vd" # kind # ", $Vn, $Vm" # kind, "", []>,
7802 bits<5> Vm;
7806 let Inst{20-16} = Vm;
7818 : I<(outs vectype:$dst), (ins vectype:$Vd, listtype:$Vn, vectype:$Vm), asm,
7819 "\t$Vd" # kind # ", $Vn, $Vm" # kind, "$Vd = $dst", []>,
7823 bits<5> Vm;
7827 let Inst{20-16} = Vm;
11248 bits<5> Vm;
11250 let Inst{20-16} = Vm;
[all …]
DSVEInstrFormats.td1539 : I<(outs zprty:$Zdn), (ins zprty:$_Zdn, srcOpType:$Vm),
1540 asm, "\t$Zdn, $Vm",
1543 bits<5> Vm;
1548 let Inst{9-5} = Vm;
1561 def : Pat<(nxv8f16 (op nxv8f16:$Zn, f16:$Vm)),
1562 (!cast<Instruction>(NAME # _H) $Zn, (INSERT_SUBREG (IMPLICIT_DEF), $Vm, hsub))>;
1563 def : Pat<(nxv4f32 (op nxv4f32:$Zn, f32:$Vm)),
1564 (!cast<Instruction>(NAME # _S) $Zn, (INSERT_SUBREG (IMPLICIT_DEF), $Vm, ssub))>;
1565 def : Pat<(nxv2f64 (op nxv2f64:$Zn, f64:$Vm)),
1566 (!cast<Instruction>(NAME # _D) $Zn, (INSERT_SUBREG (IMPLICIT_DEF), $Vm, dsub))>;
[all …]
/openbsd/src/gnu/llvm/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp6017 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0); in DecodeVCVTD() local
6018 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4); in DecodeVCVTD()
6061 if (!Check(S, DecodeDPRRegisterClass(Inst, Vm, Address, Decoder))) in DecodeVCVTD()
6076 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0); in DecodeVCVTQ() local
6077 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4); in DecodeVCVTQ()
6120 if (!Check(S, DecodeQPRRegisterClass(Inst, Vm, Address, Decoder))) in DecodeVCVTQ()
6135 unsigned Vm = (fieldFromInstruction(Insn, 0, 4) << 0); in DecodeNEONComplexLane64Instruction() local
6136 Vm |= (fieldFromInstruction(Insn, 5, 1) << 4); in DecodeNEONComplexLane64Instruction()
6150 if (!Check(S, DecodeDPRRegisterClass(Inst, Vm, Address, Decoder))) in DecodeNEONComplexLane64Instruction()
/openbsd/src/gnu/llvm/llvm/docs/
DAMDGPUOperandSyntax.rst94 **[Vm**, \ **Vn**, ... **Vk**\ **]** A sequence of 32-bit *vector* registers.
/openbsd/src/lib/libcrypto/
Dcert.pem1487 /W3c1pzAtH2lsN0/Vm+h+fbkEkj9Bn8SV7apI09bA8PgcSojt/ewsTu8mL3WmKgM