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Searched refs:VirtRegMap (Results 1 – 25 of 67) sorted by relevance

123

/openbsd/src/gnu/llvm/llvm/lib/CodeGen/
DVirtRegMap.cpp59 char VirtRegMap::ID = 0;
61 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
63 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) { in runOnMachineFunction()
78 void VirtRegMap::grow() { in grow()
85 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()
95 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) { in createSpillSlot()
109 bool VirtRegMap::hasPreferredPhys(Register VirtReg) const { in hasPreferredPhys()
118 bool VirtRegMap::hasKnownPreference(Register VirtReg) const { in hasKnownPreference()
127 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
135 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()
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DRegAllocBase.h53 class VirtRegMap; variable
67 VirtRegMap *VRM = nullptr;
85 void init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat);
DSplitKit.h45 class VirtRegMap; variable
99 const VirtRegMap &VRM;
169 SplitAnalysis(const VirtRegMap &vrm, const LiveIntervals &lis,
260 VirtRegMap &VRM;
437 SplitEditor(SplitAnalysis &SA, LiveIntervals &LIS, VirtRegMap &VRM,
DRegAllocPBQP.cpp165 void initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, Spiller &VRegSpiller);
169 MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM,
176 VirtRegMap &VRM,
182 VirtRegMap &VRM) const;
529 PBQPVirtRegAuxInfo(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM, in PBQPVirtRegAuxInfo()
562 au.addRequired<VirtRegMap>(); in getAnalysisUsage()
563 au.addPreserved<VirtRegMap>(); in getAnalysisUsage()
590 void RegAllocPBQP::initializeGraph(PBQPRAGraph &G, VirtRegMap &VRM, in initializeGraph()
693 VirtRegMap &VRM, Spiller &VRegSpiller) { in spillVReg()
718 VirtRegMap &VRM, in mapPBQPToRegAlloc()
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DLiveDebugVariables.h30 class VirtRegMap; variable
50 void emitDebugValues(VirtRegMap *VRM);
DRegAllocBasic.cpp141 INITIALIZE_PASS_DEPENDENCY(VirtRegMap) in INITIALIZE_PASS_DEPENDENCY()
193 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
194 AU.addPreserved<VirtRegMap>(); in getAnalysisUsage()
314 RegAllocBase::init(getAnalysis<VirtRegMap>(), in runOnMachineFunction()
DRegAllocPriorityAdvisor.h19 class VirtRegMap; variable
40 VirtRegMap *const VRM;
DAllocationOrder.h27 class VirtRegMap; variable
84 static AllocationOrder create(unsigned VirtReg, const VirtRegMap &VRM,
DLiveRegMatrix.cpp42 INITIALIZE_PASS_DEPENDENCY(VirtRegMap) in INITIALIZE_PASS_DEPENDENCY()
51 AU.addRequiredTransitive<VirtRegMap>(); in getAnalysisUsage()
58 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
DRegAllocEvictionAdvisor.h29 class VirtRegMap; variable
141 VirtRegMap *const VRM;
DAllocationOrder.cpp29 AllocationOrder AllocationOrder::create(unsigned VirtReg, const VirtRegMap &VRM, in create()
DLiveDebugVariables.cpp479 void rewriteLocations(VirtRegMap &VRM, const MachineFunction &MF,
485 void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
668 void emitDebugValues(VirtRegMap *VRM);
1510 void UserValue::rewriteLocations(VirtRegMap &VRM, const MachineFunction &MF, in rewriteLocations()
1537 } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) { in rewriteLocations()
1742 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS, in emitDebugValues()
1809 void LDVImpl::emitDebugValues(VirtRegMap *VRM) { in emitDebugValues()
1851 } else if (VRM->getStackSlot(Reg) != VirtRegMap::NO_STACK_SLOT) { in emitDebugValues()
1960 void LiveDebugVariables::emitDebugValues(VirtRegMap *VRM) { in emitDebugValues()
DRegAllocGreedy.h59 class VirtRegMap; variable
145 VirtRegMap *getVirtRegMap() const { return VRM; } in getVirtRegMap()
DInlineSpiller.cpp90 VirtRegMap &VRM;
138 VirtRegMap &vrm) in HoistSpillHelper()
161 VirtRegMap &VRM;
195 InlineSpiller(MachineFunctionPass &Pass, MachineFunction &MF, VirtRegMap &VRM, in InlineSpiller()
241 MachineFunction &MF, VirtRegMap &VRM, in createInlineSpiller()
1173 if (StackSlot == VirtRegMap::NO_STACK_SLOT) { in spillAll()
1642 else if (VRM.getStackSlot(Old) != VirtRegMap::NO_STACK_SLOT) in LRE_DidCloneVirtReg()
/openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/
DVirtRegMap.h33 class VirtRegMap : public MachineFunctionPass {
74 VirtRegMap() in VirtRegMap() function
77 VirtRegMap(const VirtRegMap &) = delete;
78 VirtRegMap &operator=(const VirtRegMap &) = delete;
204 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
DCalcSpillWeights.h21 class VirtRegMap; variable
48 const VirtRegMap &VRM;
58 const VirtRegMap &VRM, const MachineLoopInfo &Loops, in VirtRegAuxInfo()
80 const VirtRegMap &VRM,
DSpiller.h17 class VirtRegMap; variable
39 VirtRegMap &VRM, VirtRegAuxInfo &VRAI);
DLiveRegMatrix.h38 class VirtRegMap; variable
43 VirtRegMap *VRM;
DLiveRangeEdit.h39 class VirtRegMap; variable
71 VirtRegMap *VRM;
130 MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm,
DLiveIntervals.h51 class VirtRegMap; variable
298 void addKillFlags(const VirtRegMap*);
/openbsd/src/gnu/llvm/llvm/lib/Target/X86/
DX86TileConfig.cpp53 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
75 INITIALIZE_PASS_DEPENDENCY(VirtRegMap) in INITIALIZE_PASS_DEPENDENCY() argument
85 VirtRegMap &VRM = getAnalysis<VirtRegMap>(); in INITIALIZE_PASS_DEPENDENCY()
126 if (VRM.getPhys(VirtReg) == VirtRegMap::NO_PHYS_REG) in INITIALIZE_PASS_DEPENDENCY()
DX86RegisterInfo.h162 const MachineFunction &MF, const VirtRegMap *VRM,
/openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/
DSIPreAllocateWWMRegs.cpp40 VirtRegMap *VRM;
60 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
77 INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
200 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
DGCNNSAReassign.cpp52 AU.addRequired<VirtRegMap>(); in getAnalysisUsage()
73 VirtRegMap *VRM;
98 INITIALIZE_PASS_DEPENDENCY(VirtRegMap)
245 VRM = &getAnalysis<VirtRegMap>(); in runOnMachineFunction()
/openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/
DRISCVRegisterInfo.h100 const MachineFunction &MF, const VirtRegMap *VRM,

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