Searched refs:VZIP (Results 1 – 7 of 7) sorted by relevance
| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 208 VZIP, // zip (interleave) enumerator
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| D | ARMScheduleR52.td | 830 def : InstRW<[R52WriteFPALU_F3, R52Read_F1, R52Read_F1], (instregex "VSWP", "VTRN", "VUZP", "VZIP")…
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| D | ARMScheduleSwift.td | 600 (instregex "VSWP", "VTRN", "VUZP", "VZIP")>;
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| D | ARMISelLowering.cpp | 1768 MAKE_CASE(ARMISD::VZIP) in getTargetNodeName()
7488 return ARMISD::VZIP; in isNEONTwoResultShuffleMask()
7496 return ARMISD::VZIP; in isNEONTwoResultShuffleMask()
8449 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
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| D | ARMISelDAGToDAG.cpp | 4274 case ARMISD::VZIP: { in Select()
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| D | ARMInstrNEON.td | 525 def NEONzip : SDNode<"ARMISD::VZIP", SDTARMVSHUF2>;
2606 // 2-register shuffles (VTRN/VZIP/VUZP), both double- and quad-register.
7153 // VZIP : Vector Zip (Interleave)
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| /openbsd/src/gnu/llvm/clang/include/clang/Basic/ |
| D | arm_neon.td | 668 def VZIP : WInst<"vzip", "2..", "csiUcUsUifPcPsQcQsQiQUcQUsQUiQfQPcQPs">;
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