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Searched refs:VLMul (Results 1 – 7 of 7) sorted by relevance

/openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/
DRISCVInsertVSETVLI.cpp306 RISCVII::VLMUL VLMul = RISCVII::LMUL_1; member in __anon4c2f49c10111::VSETVLIInfo
349 RISCVII::VLMUL getVLMUL() const { return VLMul; } in getVLMUL()
378 VLMul = RISCVVType::getVLMUL(VType); in setVTYPE()
386 VLMul = L; in setVTYPE()
395 return RISCVVType::encodeVTYPE(VLMul, SEW, TailAgnostic, MaskAgnostic); in encodeVTYPE()
407 return std::tie(VLMul, SEW, TailAgnostic, MaskAgnostic) == in hasSameVTYPE()
408 std::tie(Other.VLMul, Other.SEW, Other.TailAgnostic, in hasSameVTYPE()
415 return RISCVVType::getSEWLMULRatio(SEW, VLMul); in getSEWLMULRatio()
549 << "VLMul=" << (unsigned)VLMul << ", " in print()
679 RISCVII::VLMUL VLMul = RISCVII::getLMul(TSFlags); in INITIALIZE_PASS() local
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DRISCVInstrInfoVPseudos.td296 // {SEW, VLMul} values set a valid VType to deal with this mask type.
448 let Fields = [ "Pseudo", "BaseInstr", "VLMul" ];
449 let PrimaryKey = [ "BaseInstr", "VLMul" ];
660 let VLMul = m.value;
667 RISCVVLE</*Masked*/0, /*TU*/0, /*Strided*/0, /*FF*/0, log2<EEW>.val, VLMul> {
680 RISCVVLE</*Masked*/0, /*TU*/1, /*Strided*/0, /*FF*/0, log2<EEW>.val, VLMul> {
697 RISCVVLE</*Masked*/1, /*TU*/1, /*Strided*/0, /*FF*/0, log2<EEW>.val, VLMul> {
713 RISCVVLE</*Masked*/0, /*TU*/0, /*Strided*/0, /*FF*/1, log2<EEW>.val, VLMul> {
726 RISCVVLE</*Masked*/0, /*TU*/1, /*Strided*/0, /*FF*/1, log2<EEW>.val, VLMul> {
743 RISCVVLE</*Masked*/1, /*TU*/1, /*Strided*/0, /*FF*/1, log2<EEW>.val, VLMul> {
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DRISCVInstrFormats.td181 bits<3> VLMul = 0;
182 let TSFlags{10-8} = VLMul;
DRISCVRegisterInfo.td489 int VLMul = Vlmul;
DRISCVISelDAGToDAG.cpp559 RISCVII::VLMUL VLMul = static_cast<RISCVII::VLMUL>( in selectVSETVLI() local
562 unsigned VTypeI = RISCVVType::encodeVTYPE(VLMul, SEW, /*TailAgnostic*/ true, in selectVSETVLI()
/openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/
DRISCVBaseInfo.cpp190 unsigned RISCVVType::getSEWLMULRatio(unsigned SEW, RISCVII::VLMUL VLMul) { in getSEWLMULRatio() argument
193 std::tie(LMul, Fractional) = decodeVLMUL(VLMul); in getSEWLMULRatio()
DRISCVBaseInfo.h466 unsigned getSEWLMULRatio(unsigned SEW, RISCVII::VLMUL VLMul);