| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86TargetMachine.cpp | 109 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) { in createTLOF() argument
110 if (TT.isOSBinFormatMachO()) { in createTLOF()
111 if (TT.getArch() == Triple::x86_64) in createTLOF()
116 if (TT.isOSBinFormatCOFF()) in createTLOF()
121 static std::string computeDataLayout(const Triple &TT) { in computeDataLayout() argument
125 Ret += DataLayout::getManglingComponent(TT); in computeDataLayout()
127 if (!TT.isArch64Bit() || TT.isX32() || TT.isOSNaCl()) in computeDataLayout()
134 if (TT.isArch64Bit() || TT.isOSWindows() || TT.isOSNaCl()) in computeDataLayout()
136 else if (TT.isOSIAMCU()) in computeDataLayout()
142 if (TT.isOSNaCl() || TT.isOSIAMCU()) in computeDataLayout()
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCAsmBackend.cpp | 86 Triple TT; member in __anonfbad1d420111::PPCAsmBackend
88 PPCAsmBackend(const Target &T, const Triple &TT) in PPCAsmBackend() argument
89 : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big), in PPCAsmBackend()
90 TT(TT) {} in PPCAsmBackend()
220 ELFPPCAsmBackend(const Target &T, const Triple &TT) : PPCAsmBackend(T, TT) {} in ELFPPCAsmBackend() argument
224 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); in createObjectTargetWriter()
225 bool Is64 = TT.isPPC64(); in createObjectTargetWriter()
234 XCOFFPPCAsmBackend(const Target &T, const Triple &TT) in XCOFFPPCAsmBackend() argument
235 : PPCAsmBackend(T, TT) {} in XCOFFPPCAsmBackend()
239 return createPPCXCOFFObjectWriter(TT.isArch64Bit()); in createObjectTargetWriter()
[all …]
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| /openbsd/src/gnu/gcc/libstdc++-v3/docs/html/17_intro/ |
| D | concept_check.diff | 200 void const_constraints(const TT& b) {
205 TT a;
210 TT b(a);
217 void const_constraints(const TT& b) {
218 TT c(b);
224 TT a;
284 function_requires< AssignableConcept<TT> >();
285 function_requires< DefaultConstructibleConcept<TT> >();
286 function_requires< EqualityComparableConcept<TT> >();
288 typedef typename std::iterator_traits<TT>::value_type V;
[all …]
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| /openbsd/src/gnu/lib/libstdc++/libstdc++/docs/html/17_intro/ |
| D | concept_check.diff | 200 void const_constraints(const TT& b) {
205 TT a;
210 TT b(a);
217 void const_constraints(const TT& b) {
218 TT c(b);
224 TT a;
284 function_requires< AssignableConcept<TT> >();
285 function_requires< DefaultConstructibleConcept<TT> >();
286 function_requires< EqualityComparableConcept<TT> >();
288 typedef typename std::iterator_traits<TT>::value_type V;
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCTargetMachine.cpp | 184 const Triple &TT) { in computeFSAdditions() argument
188 if (TT.getArch() == Triple::ppc64 || TT.getArch() == Triple::ppc64le) { in computeFSAdditions()
209 if (TT.isOSAIX()) { in computeFSAdditions()
219 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) { in createTLOF() argument
220 if (TT.isOSAIX()) in createTLOF()
226 static PPCTargetMachine::PPCABI computeTargetABI(const Triple &TT, in computeTargetABI() argument
236 switch (TT.getArch()) { in computeTargetABI()
240 if (TT.isPPC64ELFv2ABI()) in computeTargetABI()
249 static Reloc::Model getEffectiveRelocModel(const Triple &TT, in getEffectiveRelocModel() argument
251 assert((!TT.isOSAIX() || !RM || *RM == Reloc::PIC_) && in getEffectiveRelocModel()
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ARM/ |
| D | ARMTargetMachine.cpp | 115 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) { in createTLOF() argument
116 if (TT.isOSBinFormatMachO()) in createTLOF()
118 if (TT.isOSWindows()) in createTLOF()
124 computeTargetABI(const Triple &TT, StringRef CPU, in computeTargetABI() argument
129 ABIName = ARM::computeDefaultTargetABI(TT, CPU); in computeTargetABI()
142 static std::string computeDataLayout(const Triple &TT, StringRef CPU, in computeDataLayout() argument
145 auto ABI = computeTargetABI(TT, CPU, Options); in computeDataLayout()
155 Ret += DataLayout::getManglingComponent(TT); in computeDataLayout()
189 if (TT.isOSNaCl() || ABI == ARMBaseTargetMachine::ARM_ABI_AAPCS16) in computeDataLayout()
199 static Reloc::Model getEffectiveRelocModel(const Triple &TT, in getEffectiveRelocModel() argument
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AArch64/ |
| D | AArch64TargetMachine.cpp | 246 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) { in createTLOF() argument
247 if (TT.isOSBinFormatMachO()) in createTLOF()
249 if (TT.isOSBinFormatCOFF()) in createTLOF()
256 static std::string computeDataLayout(const Triple &TT, in computeDataLayout() argument
259 if (TT.isOSBinFormatMachO()) { in computeDataLayout()
260 if (TT.getArch() == Triple::aarch64_32) in computeDataLayout()
264 if (TT.isOSBinFormatCOFF()) in computeDataLayout()
267 std::string Ptr32 = TT.getEnvironment() == Triple::GNUILP32 ? "-p:32:32" : ""; in computeDataLayout()
272 static StringRef computeDefaultCPU(const Triple &TT, StringRef CPU) { in computeDefaultCPU() argument
273 if (CPU.empty() && TT.isArm64e()) in computeDefaultCPU()
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/ |
| D | TargetMachine.cpp | 32 const Triple &TT, StringRef CPU, StringRef FS, in TargetMachine() argument
34 : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), in TargetMachine()
90 const Triple &TT = getTargetTriple(); in shouldAssumeDSOLocal() local
108 if (TT.isOSBinFormatCOFF()) { in shouldAssumeDSOLocal()
118 if (TT.isWindowsGNUEnvironment() && GV->isDeclarationForLinker() && in shouldAssumeDSOLocal()
132 if (TT.isOSBinFormatGOFF()) in shouldAssumeDSOLocal()
135 if (TT.isOSBinFormatMachO()) { in shouldAssumeDSOLocal()
141 assert(TT.isOSBinFormatELF() || TT.isOSBinFormatWasm() || in shouldAssumeDSOLocal()
142 TT.isOSBinFormatXCOFF()); in shouldAssumeDSOLocal()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCTargetDesc.cpp | 49 StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) { in selectMipsCPU() argument
51 if (TT.getSubArch() == llvm::Triple::MipsSubArch_r6) { in selectMipsCPU()
52 if (TT.isMIPS32()) in selectMipsCPU()
57 if (TT.isMIPS32()) in selectMipsCPU()
72 static MCRegisterInfo *createMipsMCRegisterInfo(const Triple &TT) { in createMipsMCRegisterInfo() argument
78 static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT, in createMipsMCSubtargetInfo() argument
80 CPU = MIPS_MC::selectMipsCPU(TT, CPU); in createMipsMCSubtargetInfo()
81 return createMipsMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); in createMipsMCSubtargetInfo()
85 const Triple &TT, in createMipsMCAsmInfo() argument
87 MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options); in createMipsMCAsmInfo()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/MCTargetDesc/ |
| D | SparcMCTargetDesc.cpp | 37 const Triple &TT, in createSparcMCAsmInfo() argument
39 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); in createSparcMCAsmInfo()
47 const Triple &TT, in createSparcV9MCAsmInfo() argument
49 MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); in createSparcV9MCAsmInfo()
62 static MCRegisterInfo *createSparcMCRegisterInfo(const Triple &TT) { in createSparcMCRegisterInfo() argument
69 createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { in createSparcMCSubtargetInfo() argument
71 CPU = (TT.getArch() == Triple::sparcv9) ? "v9" : "v8"; in createSparcMCSubtargetInfo()
72 return createSparcMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); in createSparcMCSubtargetInfo()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVSubtarget.cpp | 54 RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU, in initializeSubtargetDependencies() argument
58 bool Is64Bit = TT.isArch64Bit(); in initializeSubtargetDependencies()
71 TargetABI = RISCVABI::computeTargetABI(TT, getFeatureBits(), ABIName); in initializeSubtargetDependencies()
72 RISCVFeatures::validate(TT, getFeatureBits()); in initializeSubtargetDependencies()
76 RISCVSubtarget::RISCVSubtarget(const Triple &TT, StringRef CPU, in RISCVSubtarget() argument
81 : RISCVGenSubtargetInfo(TT, CPU, TuneCPU, FS), in RISCVSubtarget()
84 initializeSubtargetDependencies(TT, CPU, TuneCPU, FS, ABIName)), in RISCVSubtarget()
86 if (RISCV::isX18ReservedByDefault(TT)) in RISCVSubtarget()
|
| /openbsd/src/gnu/llvm/llvm/lib/Transforms/Instrumentation/ |
| D | InstrProfiling.cpp | 443 if (TT.isOSBinFormatMachO()) in isRuntimeCounterRelocationEnabled()
450 return TT.isOSFuchsia(); in isRuntimeCounterRelocationEnabled()
495 static bool needsRuntimeHookUnconditionally(const Triple &TT) { in needsRuntimeHookUnconditionally() argument
497 if (TT.isOSFuchsia()) in needsRuntimeHookUnconditionally()
525 TT = Triple(M.getTargetTriple()); in run()
528 bool NeedsRuntimeHook = needsRuntimeHookUnconditionally(TT); in run()
696 if (TT.supportsCOMDAT()) in getCounterAddress()
826 static bool needsRuntimeRegistrationOfSectionRange(const Triple &TT) { in needsRuntimeRegistrationOfSectionRange() argument
828 if (TT.isOSDarwin()) in needsRuntimeRegistrationOfSectionRange()
831 if (TT.isOSAIX() || TT.isOSLinux() || TT.isOSFreeBSD() || TT.isOSNetBSD() || in needsRuntimeRegistrationOfSectionRange()
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsTargetMachine.cpp | 74 static std::string computeDataLayout(const Triple &TT, StringRef CPU, in computeDataLayout() argument
78 MipsABIInfo ABI = MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions); in computeDataLayout()
122 MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT, in MipsTargetMachine() argument
129 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, in MipsTargetMachine()
133 ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)), in MipsTargetMachine()
135 DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt), in MipsTargetMachine()
136 NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16", in MipsTargetMachine()
138 Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16", in MipsTargetMachine()
151 MipsebTargetMachine::MipsebTargetMachine(const Target &T, const Triple &TT, in MipsebTargetMachine() argument
157 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} in MipsebTargetMachine()
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/MC/MCDisassembler/ |
| D | Disassembler.cpp | 45 LLVMCreateDisasmCPUFeatures(const char *TT, const char *CPU, in LLVMCreateDisasmCPUFeatures() argument
51 const Target *TheTarget = TargetRegistry::lookupTarget(TT, Error); in LLVMCreateDisasmCPUFeatures()
55 std::unique_ptr<const MCRegisterInfo> MRI(TheTarget->createMCRegInfo(TT)); in LLVMCreateDisasmCPUFeatures()
62 TheTarget->createMCAsmInfo(*MRI, TT, MCOptions)); in LLVMCreateDisasmCPUFeatures()
71 TheTarget->createMCSubtargetInfo(TT, CPU, Features)); in LLVMCreateDisasmCPUFeatures()
77 new MCContext(Triple(TT), MAI.get(), MRI.get(), STI.get())); in LLVMCreateDisasmCPUFeatures()
88 TheTarget->createMCRelocationInfo(TT, *Ctx)); in LLVMCreateDisasmCPUFeatures()
93 TT, GetOpInfo, SymbolLookUp, DisInfo, Ctx.get(), std::move(RelInfo))); in LLVMCreateDisasmCPUFeatures()
99 Triple(TT), AsmPrinterVariant, *MAI, *MII, *MRI)); in LLVMCreateDisasmCPUFeatures()
104 TT, DisInfo, TagType, GetOpInfo, SymbolLookUp, TheTarget, std::move(MAI), in LLVMCreateDisasmCPUFeatures()
[all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | R600Subtarget.cpp | 25 R600Subtarget::R600Subtarget(const Triple &TT, StringRef GPU, StringRef FS, in R600Subtarget() argument
27 : R600GenSubtargetInfo(TT, GPU, /*TuneCPU*/ GPU, FS), AMDGPUSubtarget(TT), in R600Subtarget()
30 TLInfo(TM, initializeSubtargetDependencies(TT, GPU, FS)), in R600Subtarget()
35 R600Subtarget &R600Subtarget::initializeSubtargetDependencies(const Triple &TT, in initializeSubtargetDependencies() argument
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/ |
| D | SparcTargetMachine.cpp | 99 SparcTargetMachine::SparcTargetMachine(const Target &T, const Triple &TT, in SparcTargetMachine() argument
106 : LLVMTargetMachine(T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options, in SparcTargetMachine()
112 Subtarget(TT, std::string(CPU), std::string(FS), *this, is64bit), in SparcTargetMachine()
209 SparcV8TargetMachine::SparcV8TargetMachine(const Target &T, const Triple &TT, in SparcV8TargetMachine() argument
215 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} in SparcV8TargetMachine()
219 SparcV9TargetMachine::SparcV9TargetMachine(const Target &T, const Triple &TT, in SparcV9TargetMachine() argument
225 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} in SparcV9TargetMachine()
229 SparcelTargetMachine::SparcelTargetMachine(const Target &T, const Triple &TT, in SparcelTargetMachine() argument
235 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} in SparcelTargetMachine()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVMCTargetDesc.cpp | 53 static MCRegisterInfo *createRISCVMCRegisterInfo(const Triple &TT) { in createRISCVMCRegisterInfo() argument
60 const Triple &TT, in createRISCVMCAsmInfo() argument
62 MCAsmInfo *MAI = new RISCVMCAsmInfo(TT); in createRISCVMCAsmInfo()
79 static MCSubtargetInfo *createRISCVMCSubtargetInfo(const Triple &TT, in createRISCVMCSubtargetInfo() argument
82 CPU = TT.isArch64Bit() ? "generic-rv64" : "generic-rv32"; in createRISCVMCSubtargetInfo()
84 return createRISCVMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); in createRISCVMCSubtargetInfo()
97 const Triple &TT = STI.getTargetTriple(); in createRISCVObjectTargetStreamer() local
98 if (TT.isOSBinFormatELF()) in createRISCVObjectTargetStreamer()
|
| /openbsd/src/gnu/llvm/llvm/lib/ExecutionEngine/Orc/ |
| D | JITTargetMachineBuilder.cpp | 18 JITTargetMachineBuilder::JITTargetMachineBuilder(Triple TT) in JITTargetMachineBuilder() argument
19 : TT(std::move(TT)) { in JITTargetMachineBuilder()
47 auto *TheTarget = TargetRegistry::lookupTarget(TT.getTriple(), ErrMsg); in createTargetMachine()
56 TheTarget->createTargetMachine(TT.getTriple(), CPU, Features.getString(), in createTargetMachine()
75 << Indent << " Triple = \"" << JTMB.TT.str() << "\"\n" in print()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/ARC/MCTargetDesc/ |
| D | ARCMCTargetDesc.cpp | 44 static MCRegisterInfo *createARCMCRegisterInfo(const Triple &TT) { in createARCMCRegisterInfo() argument
50 static MCSubtargetInfo *createARCMCSubtargetInfo(const Triple &TT, in createARCMCSubtargetInfo() argument
52 return createARCMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, FS); in createARCMCSubtargetInfo()
56 const Triple &TT, in createARCMCAsmInfo() argument
58 MCAsmInfo *MAI = new ARCMCAsmInfo(TT); in createARCMCAsmInfo()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/MSP430/ |
| D | MSP430TargetMachine.cpp | 37 static std::string computeDataLayout(const Triple &TT, StringRef CPU, in computeDataLayout() argument
42 MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT, in MSP430TargetMachine() argument
48 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, in MSP430TargetMachine()
52 Subtarget(TT, std::string(CPU), std::string(FS), *this) { in MSP430TargetMachine()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/VE/MCTargetDesc/ |
| D | VEMCTargetDesc.cpp | 36 static MCAsmInfo *createVEMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT, in createVEMCAsmInfo() argument
38 MCAsmInfo *MAI = new VEELFMCAsmInfo(TT); in createVEMCAsmInfo()
51 static MCRegisterInfo *createVEMCRegisterInfo(const Triple &TT) { in createVEMCRegisterInfo() argument
57 static MCSubtargetInfo *createVEMCSubtargetInfo(const Triple &TT, StringRef CPU, in createVEMCSubtargetInfo() argument
61 return createVEMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, FS); in createVEMCSubtargetInfo()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/ |
| D | BPFTargetMachine.cpp | 55 static std::string computeDataLayout(const Triple &TT) { in computeDataLayout() argument
56 if (TT.getArch() == Triple::bpfeb) in computeDataLayout()
66 BPFTargetMachine::BPFTargetMachine(const Target &T, const Triple &TT, in BPFTargetMachine() argument
72 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, in BPFTargetMachine()
76 Subtarget(TT, std::string(CPU), std::string(FS), *this) { in BPFTargetMachine()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZTargetMachine.cpp | 47 static std::string computeDataLayout(const Triple &TT) { in computeDataLayout() argument
54 Ret += DataLayout::getManglingComponent(TT); in computeDataLayout()
80 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) { in createTLOF() argument
81 if (TT.isOSzOS()) in createTLOF()
141 SystemZTargetMachine::SystemZTargetMachine(const Target &T, const Triple &TT, in SystemZTargetMachine() argument
148 T, computeDataLayout(TT), TT, CPU, FS, Options, in SystemZTargetMachine()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| D | AMDGPUMCTargetDesc.cpp | 62 static MCRegisterInfo *createAMDGPUMCRegisterInfo(const Triple &TT) { in createAMDGPUMCRegisterInfo() argument
64 if (TT.getArch() == Triple::r600) in createAMDGPUMCRegisterInfo()
78 createAMDGPUMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { in createAMDGPUMCSubtargetInfo() argument
79 if (TT.getArch() == Triple::r600) in createAMDGPUMCSubtargetInfo()
80 return createR600MCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); in createAMDGPUMCSubtargetInfo()
81 return createAMDGPUMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); in createAMDGPUMCSubtargetInfo()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/XCore/MCTargetDesc/ |
| D | XCoreMCTargetDesc.cpp | 47 static MCRegisterInfo *createXCoreMCRegisterInfo(const Triple &TT) { in createXCoreMCRegisterInfo() argument
54 createXCoreMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { in createXCoreMCSubtargetInfo() argument
55 return createXCoreMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); in createXCoreMCSubtargetInfo()
59 const Triple &TT, in createXCoreMCAsmInfo() argument
61 MCAsmInfo *MAI = new XCoreMCAsmInfo(TT); in createXCoreMCAsmInfo()
|